1988-11-01
1990-06-19
Jackson, Jr., Jerome
357 4, 357 45, H01L 2978, H01L 2712
Patent
active
049357921
ABSTRACT:
A thin film transistor array in which a plurality of thin film transistors arranged in the shape of an array on a substrate each transistor includes a gate electrode, a first insulating layer, a semiconducting layer, a second insulating layer, a source electrode and a drain electrode stacked sequentially one on another such that the first insulating layer and the second insulating layer are interposed at an overlap portion between a gate bus bar for connecting the gate electrodes in common and a source bus bar for connecting the source electrodes in common.
REFERENCES:
patent: 4065781 (1977-12-01), Gutknecht
patent: 4332075 (1982-01-01), Ota
patent: 4425572 (1984-01-01), Takafuji et al.
patent: 4646424 (1987-03-01), Parks et al.
patent: 4651185 (1987-03-01), Holmberg et al.
patent: 4804953 (1989-02-01), Castleberry
Kato Hiroaki
Kishi Kohei
Koden Mitsuhiro
Tanaka Hirohisa
Jackson, Jr. Jerome
Sharp Kabushiki Kaisha
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