1990-11-21
1992-10-13
Hille, Rolf
357 4, 357 45, 357 71, H01L 27120, H01L 27105, H01L 23485, H01L 29540
Patent
active
051555646
ABSTRACT:
A thin-film transistor array has an insulating substrate; a plurality of thin-film transistors disposed in a matrix form on the substrate; a plurality of gate bus lines formed parallel to each other on the substrate, each of the gate bus lines being connected electrically with the gate electrodes of the thin-film transistors in the corresponding row of the matrix; and a plurality of source bus lines formed perpendicular to the gate bus lines on the substrate, each of the source bus lines being connected electrically with the source electrodes of the thin-film transistors in the corresponding column of the matrix; wherein at the intersections of the gate bus lines and the source bus lines, there is disposed a layered structure between the gate bus line and the source bus line, having successively a gate insulating film, a first semiconductor film, a protective insulating film, and a second semiconductor film which is connected electrically with the source intersections, wherein the width of the protective insulating film in the direction in which the gate bus line extends is equal to or greater than that of the second semiconductor film in that direction.
REFERENCES:
patent: 4843438 (1989-06-01), Koden et al.
patent: 4857907 (1989-08-01), Koden
patent: 5075674 (1991-12-01), Katayama et al.
Hamada Hiroshi
Hishida Tadanori
Nagatomi Hisato
Shoji Hajime
Brown Peter Toby
Hille Rolf
Sharp Kabushiki Kaisha
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