Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2001-06-18
2003-05-13
Hu, Shouxiang (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S059000
Reexamination Certificate
active
06563135
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin film transistor and a method of forming the same, and more particularly, to a lightly doped drain (LDD) or offset structure of a thin film transistor providing enhanced performance by uniformly forming an LDD region or offset region.
2. Description of Related Art
To date, amorphous silicon thin film transistors constitute a main component of a conventional active matrix liquid crystal display (AMLCD). Compared to amorphous silicon, polysilicon has higher mobility, and, if used in a liquid crystal display, does not require a separate drive circuit. Instead, the drive circuit can be formed internally.
A recently developed polysilicon thin film transistor liquid crystal display includes a drive circuit and pixel array formed together on a transparent glass substrate. The thin film transistors of the drive circuit allow high frequency switching due to the use of polysilicon. However, thin film transistors used for pixel switching in a pixel array interfere with the switching of the thin film transistors in the drive circuit because the high drain current generated during an off state of the pixel switching transistors. In order to lower this off current to a predetermined level, thin film transistors incorporating an LDD structure, offset structure, and a dual gate structure have been suggested.
FIG. 1
shows a plan view of a portion of a pixel in a conventional liquid crystal display which uses a thin film transistor as a pixel switching element.
FIG. 2
shows a cross-sectional view of the conventional liquid crystal display, taken along line II—II of FIG.
1
.
As shown in
FIG. 1
, a signal line
13
′ and a data line
18
′ cross each other on an insulating substrate
10
. The gate electrode
13
of a thin film transistor extends from the signal line
13
′, and the source electrode
18
of the thin film transistor extends from the data line
18
′. The drain electrode
19
of the thin film transistor, which faces the source electrode
18
, is connected to a pixel electrode
21
. A first storage capacitor electrode
24
crosses over data line
18
′. The pixel electrode
21
, formed of a transferring conductive material on the first storage capacitor electrode
24
, functions as a second storage capacitor electrode.
As shown in
FIG. 2
, a semiconductor active layer
11
is formed on an insulating substrate
10
. The semiconductor active layer
11
is made of a polysilicon thin film. On the sides of the semiconductor active layer
11
, high concentration impurity source and drain regions
11
a
and
11
b
are formed. Between the source and drain regions
11
a
and
11
b
, a channel region
11
c
is established. Between the source region
11
a
and the channel region
11
c
and between the drain region
11
b
and the channel region
11
c
, low concentration impurity LDD regions
16
are formed. On the channel region
11
c
, a gate insulating layer
12
and a gate electrode
13
are formed. Over the gate electrode
13
, an insulating inter-layer
17
having a plurality of contact holes is formed. The source electrode
18
and the drain electrode
19
respectively contact the source region
11
a
and the drain region
11
b
through the contact holes formed in the insulating inter-layer
17
. On the insulating inter-layer
17
, a protective layer
20
is formed, and defines a contact hole through which a pixel electrode
21
contacts the drain electrode
19
.
FIGS. 3A-3D
show cross-sectional views taken along line III—III of
FIG. 1
for illustrating a conventional method of manufacturing the conventional LDD structure of a thin film transistor.
As shown in
FIG. 3A
, polysilicon is formed on the insulating substrate
10
, and patterned to form the semiconductor active layer
11
. On the semiconductor active layer
11
and the exposed substrate
10
, a first insulating layer and a first conductive layer are sequentially formed. The first conductive layer is a metal material or an impurity doped polysilicon type of conductive material. The first insulating layer and the first conductive layer are patterned according to a prescribed shape to form the gate insulating layer
12
and the gate electrode
13
. At the same time, the signal line
13
′, connected to the gate electrode
13
, and the first storage capacitor electrode
24
are formed (see FIG.
1
).
As shown in
FIG. 3B
, photoresist is deposited (e.g., coated) over the substrate
10
, and patterned to form an ion injection or implantation mask
15
. Using the mask
15
, high concentration impurity ions are injected by ion implantation or doping into the exposed semiconductor active layer
11
to form the source region
11
a
and the drain region
11
b
. Thereafter, heat treatment or annealing, using a laser, is performed to planarize the semiconductor active layer
11
. The mask
15
is completely removed thereafter.
As shown in
FIG. 3C
, using the gate electrode
13
as a mask, low concentration conductive type ions are implanted into the semiconductor active layer
11
to form the LDD regions
16
adjacent to the source region
11
a
and the drain region
11
b
. As a result, the semiconductor active layer
11
includes the source region
11
a
, LDD region
16
, channel region
11
c
, LDD region
16
, and drain region
11
b.
As shown in
FIG. 3D
, a second insulating layer, such as oxide material, is formed over the substrate
10
and patterned to form the insulating inter-layer
17
. Through the insulating inter-layer
17
, contact holes are formed to expose a portion of the source region
11
a
and a portion of the drain region lib. On the insulating inter-layer
17
and the contact holes, a second conductive material is deposited and patterned to form the source electrode
18
and the drain electrode
19
respectively connected to the source region
11
a
and the drain region
11
b
through respective contact holes.
Thereafter, a shown in
FIG. 2
, a third insulating layer is deposited and patterned to form the protective layer
20
. Through the protective layer
20
, a contact hole is formed to expose a portion of the drain electrode
19
. On the protective layer
20
, a third conductive material is deposited and patterned to form the pixel electrode
21
. The pixel electrode
21
contacts the drain electrode
19
through the contact hole in the protective layer
20
.
As described above, forming the conventional LDD structure of a polycrystaline silicon transistor requires the use of photoresist as an ion injection mask to form the LDD regions. That is, over the insulating substrate
10
, having the semiconductor active layer
11
and the gate electrode
13
, photoresist is coated over the insulating substrate
10
and etched using a mask corresponding to an LDD pattern to be formed later in order to form an ion injection mask. However, use of such a mask results in misalignment and over-etching of the LDD region. As a result, the conventional method of manufacturing an LDD structure of a thin film transistor has problems of accurately and uniformly establishing LDD regions. If the LDD regions are not accurately formed, the thin film transistors will not be uniformly formed, the picture quality uniformity deteriorates, the contrast ratio decreases, and the flicker phenomenon occurs.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an improvement in transistor structure which overcomes the above-described and other problems encountered in related and conventional thin film transistors.
Another object of the present invention is to provide a thin film transistor having uniformly sized LDD regions.
To achieve the above and other objects of the present invention, a thin film transistor comprising: a first insulating layer; an active region formed on the first insulating layer, the active region including a channel region, a source region formed on a first side of the channel region, a drain region formed on a second side of the channel region, a sub-channel
Hu Shouxiang
LG Electronics Inc.
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