Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2001-02-16
2002-08-20
Jackson, Jr., Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S052000, C257S057000, C257S058000, C257S061000, C257S064000
Reexamination Certificate
active
06437368
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to a thin film transistor, and particularly relates to a thin film transistor including a semiconductor film made of amorphous silicon (a-Si).
BACKGROUND OF THE INVENTION
Recently, for their superior characteristics as to compact size, thinness, low power consumption, light weight, etc., liquid crystal display devices have been used in variety of electric apparatuses. Particularly, active-matrix-type liquid crystal display devices adopting switching elements as active elements which offer equivalent display characteristics to those of CRT (Cathode Ray Tube) have been widely used in OA apparatuses such as personal computers, or AV apparatuses such as portable televisions, or the like. An example structure of such active-matrix-type liquid crystal devices will be explained in details in reference to FIG.
6
.
FIG. 6
is a cross sectional view schematically illustrating the typical structure of the active-matrix-type liquid crystal display device. The active-matrix-type liquid crystal display device includes a TFT (Thin Film Transistor) substrate
101
and a counter substrate
102
which are connected so as to face one another, and liquid crystal
103
sealed in a space between the TFT substrate
101
and the counter substrate
102
.
The TFT substrate
101
includes a transparent insulating substrate
104
, and a gate electrode
105
, a source bus line (not shown), a TFT (not shown) and a pixel electrode
106
connected to the TFT which are formed on the surface of the transparent insulating substrate
104
on the side of the liquid crystal
103
, and further includes an alignment film
107
formed so as to cover the entire surface of the transparent insulating substrate
104
including these members. The surface of this alignment film
107
is rubbing processed.
On the other hand, the counter substrate
102
includes a transparent insulating substrate
108
, and a transparent electrode
109
and an alignment film
110
which are formed in this order on a color filter (not shown) disposed on the surface of the transparent insulating substrate
108
on the side of the liquid crystal
103
. The surface of this alignment film
110
is rubbing processed. In
FIG. 6
, reference numerals
111
and
112
indicate polarizing plates.
The structure of a conventional TFT adopted in the active-matrix-type liquid crystal display device will be explained in details in reference to
FIGS. 7 and 8
.
FIG. 7
is a plan view illustrating a layout per pixel of the TFT substrate
101
, while
FIG. 8
illustrates a cross section of the portion along an arrow line B—B in FIG.
8
.
As illustrated in
FIG. 7
, the TFT substrate
101
includes gate bus lines
113
and source bus lines
114
arranged in a matrix form. Further, a gate electrode
105
and a source electrode
115
are formed as branches of the gate bus line
113
and the source bus line
114
respectively for each pixel.
Next, the concrete structure of the TFT will be explained while explaining the manufacturing steps thereof in reference to FIG.
8
.
First, the gate electrode
105
is formed on the transparent insulating substrate
104
, and thereafter, a gate insulating film
116
is formed thereon so as to cover the gate electrode
105
. Then, on this gate insulating film
116
, an amorphous silicon semiconductor layer
117
without impurity and an amorphous silicon semiconductor layer
118
with impurity are patterned in a shape of island. Further, the source electrode
115
and the drain electrode
119
are formed by etching by setting an etching selectivity ratio to the amorphous silicon semiconductor layer
118
with impurity (the amorphous silicon semiconductor layer
118
is not etched completely). Then, this amorphous silicon semiconductor layer
118
with impurity is subjected to etching to form a source/drain separated portion, and further the pixel electrode
106
is formed by the transparent electrode. Thereafter, the entire surface of the TFT substrate
101
is covered with an protective film
120
.
Hereinafter, a path for flowing therethrough an OFF-state current (to be described later) formed on the surface or the interface of the amorphous silicon semiconductor layer
117
without impurity at a portion (source/drain separated portion) between the source electrode
115
and the drain electrode
119
is referred to as a back channel.
However, for the thin film transistor manufactured by the foregoing conventional method, the following problem remains unsolved. That is, in the state an electric field induced by the externally applied positive charges due to the surface contaminations or by the positive charges of the protective film itself becomes not less than the threshold level of the back channel, the OFF-state current value of the TFT (leak current value in the OFF state) increases due to the back channel effects. The ratio of the ON-state current to the OFF-state current of the TFT determines the contrast of the display device which greatly affects the display quality. Further, the described phenomenon of increasing the OFF-state current value of the TFT due to the back channel effects is induced by driving the thin film transistor over a long period of time, and the foregoing problem of an increase in the OFF-state current is serious as it affects the reliability of the product.
Here, the back channel effects are defined to be a phenomenon in which electrons are induced in the back channel by the externally applied positive charges due to the surface contaminations or by the positive charges of the protective film itself.
Here, as a solution to the above problem, for example, Japanese Unexamined Patent Publication No. 8440/1996 (Tokukaihei 8-8440 published on Jan. 12, 1996) discloses a structure wherein a p-type amorphous silicon layer is formed between the amorphous silicon semiconductor layer and the protective film in the back channel region so as to prevent an increase in OFF-state current value caused by electrons induced in the back channel.
However, according to the structure of the thin film transistor disclosed in Japanese Unexamined Patent Publication No. 8440/1996, a problem arises in that for the formation of this p-type amorphous silicon layer, the required number of steps for manufacturing the thin film transistor increases, resulting in an increase in manufacturing cost.
According to the foregoing conventional method, it is therefore not possible to provide the thin film transistor which realizes a further reduction in OFF-state current and which can be manufactured at lower cost through a smaller number of steps.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a thin film transistor which realizes a further reduction in OFF-state current and which can be manufactured at lower cost through a smaller number of steps.
In order to attain the foregoing object, a thin film transistor of the present invention is arranged so as to include:
a gate electrode provided on a transparent insulating substrate;
a first semiconductor layer formed on the gate electrode via a gate insulating film; and
a source electrode and a drain electrode formed on the first semiconductor layer via a second semiconductor layer which functions as a contact layer,
wherein protrusions and recessions are formed in a separated portion between the source electrode and the drain electrode on a surface of the first semiconductor layer.
Here, the surface of the first semiconductor layer between the source electrode and the drain electrode is referred to as a back channel region (a region where a back channel is formed).
In the foregoing structure, the non-bonded area where bonds are cut is increased in the back channel region by the surface protrusions and recessions formed in the source/drain separated portion on the surface (back channel region) of the first semiconductor layer, and the number of uncombined bonds increases consequently. Accordingly, defects which trap carriers increase in the back channel region, and the effect of bending a band can be
Hiraki Junichi
Tsubata Toshihide
Jackson, Jr. Jerome
Richards N. Drew
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