Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2002-10-04
2004-11-02
Lebentritt, Michael (Department: 2824)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S064000, C257S066000, C257S072000, C257S075000, C438S149000, C438S151000, C438S163000, C438S164000
Reexamination Certificate
active
06812493
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a method of producing a thin film semiconductor element, and more particularly to its improvement in miniaturization, price, and performance.
BACKGROUND ART
In recent years, progress in flat displays represented by liquid crystal display panels is remarkable.
In liquid crystal displays, active matrix liquid crystal displays having switching elements disposed in each pixel have become widespread.
In other display panels such as plasma displays, electroluminescence displays, and field emission displays, switching elements are disposed for controlling pixels.
As these switching elements, MIMs (metal-insulator-metal) and TFTs (thin-film-transistor) are employed.
TFTS, on one hand, are excellent in fast-response, but on the other, their complicated production process increases production cost, thereby arousing the need for cheaper TFTs. In addition, in display panels such as liquid crystal displays, switching elements are disposed in non-display regions unused for displaying pixels, thereby arousing the need for miniaturized TFTs in terms of high definition display. The miniaturization of TFTs is also needed for other devices in terms of highly dense packages on substrates.
A top gate type MIS (metal-insulator-semiconductor) TFT widely used in liquid crystal displays and the like is shown in
FIGS. 20
a
and
20
b.
A TFT, which is disposed on an insulation substrate
1
composed of glass or the like via an undercoat layer
2
, is provided with a semiconductor thin film
3
composed of amorphous silicon (a-Si), polycrystal silicon (p-Si), or the like. In a source region
3
b
and a drain region
3
c
of the semiconductor thin film
3
, N type or P type impurity ions are implanted. When voltage is applied on a gate electrode
5
a
disposed above a channel region (active region)
3
a
of the semiconductor thin film
3
via an insulation film
4
, a source electrode wiring line
8
b
and a drain electrode wiring line
8
c
are electrically connected.
The undercoat
2
prevents impurities from mixing from the substrate
1
into the semiconductor thin film
3
, and is composed of silicon oxide, for example. A gate insulation film
4
a
is composed of silicon oxide, for example.
The gate electrode
5
a
is composed of a metal with a high melting point of 1000° C. or more such as chromium in order to resist heat treatment to activate a semiconductor thin film in production process.
This TFT is produced in the following manner, for example.
First, as shown in
FIG. 21
a
, an undercoat layer
2
and a semiconductor thin film
3
are formed on one surface of a substrate
1
, and the thin film
3
is then processed into a predetermined pattern by etching using a resist layer
18
as a mask.
Next, on the semiconductor thin film
3
, an insulation film
4
and a gate electrode
5
a
are formed. For example, as shown in
FIG. 21
b
, the insulation film
4
composed of silicon oxide and a conductive film
5
composed of chromium are formed to cover the semiconductor thin film
3
. Thereafter, the conductive film
5
is processed into a predetermined pattern by etching using a resist layer
19
as a mask, thus forming the gate electrode
5
a.
Using the formed gate electrode
5
a
and the insulation film
4
as masks, P type or N type impurity ions are implanted in the semiconductor thin film
3
, thus forming a source region
3
b
and a drain region
3
c
, as shown in
FIG. 21
c.
Note that, in the case of a TFT with an LDD (lightly-doped drain) structure, ions are further implanted into any one of the above-formed source region
3
b
and drain region
3
c
separated from the channel region
3
a
so that the separated region has a higher ion concentration.
In the case of a TFT with what is called an “offset structure”, a mask covering a periphery of the gate electrode
5
a
is used for the above-described ion-implanting.
Thereover, an insulation film
6
composed of silicon oxide, for example, is formed, and in this insulation film
6
, a contact hole
6
a
for connecting the source region
3
b
and drain region
3
c
of the thin film
3
to external wiring lines is formed by etching using resist layers
21
as masks.
Thereover, after forming the contact hole
6
a
, a conductive film
8
composed of aluminum, for example, is formed as shown in
FIG. 21
e,
and a source electrode wiring line
8
b
, a drain electrode wiring line
8
c
, and the like are formed by etching using resist layers
20
as masks, thereby obtaining the TFT shown in
FIGS. 20
a
and
20
b.
Thereover, in an actual device, other signal wiring lines such as a line to connect a source wiring line to a signal source and the like are further formed via an insulation film in a similar manner.
Generally, elements are designed to avoid variations in the properties of finished products caused by errors and variations in production processes. Design margins for stable production may be one of factors to prevent the miniaturization of elements. In the production of the above-described conventional TFT, such designs are indispensable as to avoid size variations of masks used in etching and ion-implanting, and mispositioning of masks and substrates (or thin films to be processed). For example, when forming a contact hole, they need to be considered to secure a sufficient distance between a place where the contact hole is disposed and a gate electrode. Accordingly, conventional TFTs have been forced to be made longer in their longitudinal directions than preferable designs in terms of functionality.
The above-described design margins may also reduce the properties of elements and devices using the elements. For example, distances between edge portions of a channel region and source/drain electrode wiring lines, in other words, a distance between a gate electrode and a contact hole has great effect on electric current strength between the source/drain electrode wiring lines in the on-state of an element. It is difficult to reduce the electric resistance of source/drain regions down to the levels of metal wiring lines, even if impurity concentrations of the regions are increased. In addition, extreme increase in the impurity concentrations of the regions makes the element less reliable. Thus, the design margin between the gate electrode and the contact hole increases source/drain electric resistance, thereby reducing electric current in the on-state of the element.
DISCLOSURE OF THE INVENTION
It is an object of the present invention to solve the foregoing problems and provide a thin film semiconductor element which is small in area with high on-current enough to be suitable for the power saving, miniaturization, and high definition display of a device. It is another object of the present invention to provide such excellent thin film semiconductor element at low price.
The present invention reduces an element area to a great extent by reducing source/drain areas of a transistor. Also, the present invention increases on-current of the element by extensively reducing distances between a gate electrode and source/drain electrodes (wiring lines).
Moreover, the present invention simplifies production process of an element.
According to the present invention, an outer shape of a semiconductor thin film is processed, and regions (a channel region, a source region, and a drain region) of the semiconductor thin film are formed by using other element components as masks such as a gate electrode. Specifically, the gate electrode and the like are formed first, and then the semiconductor thin film is self-aligningly processed in correspondence with shapes of those components Thus, design margins required of the production of conventional thin film semiconductor elements are made less to the greatest possible degree, and a thin film semiconductor element which is small in size and excellent in properties is realized. In addition, production process is simplified such as to decrease the number of masks required.
In the production of a thin film semiconductor element of the present invention, an ion-implanted
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