1990-07-02
1991-07-30
Prenty, Mark
357 237, 357 2315, 357 71, H01L 2712, H01L 2701, H01L 2978, H01L 2348
Patent
active
050363700
ABSTRACT:
The production of a thin film transistor array device having a gate wiring on an insulated substrate. The gate wiring has an inner gate wiring having a first metal layer formed on the insulated substrate and a second metal layer whose etching speed is faster than that of the first metal layer, the first metal layer and the second metal layer being overlapped so as to constitute a dual structure, and an outer gate wiring covering the inner gate wiring.
REFERENCES:
patent: 4776673 (1988-10-01), Aoki et al.
patent: 4905066 (1990-02-01), Dohjo et al.
Hirobe Toshihiko
Imaya Akihiko
Kato Hiroaki
Miyago Makoto
Nagayasu Takayoshi
Prenty Mark
Sharp Kabushiki Kaisha
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