Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Patent
1990-03-30
1993-06-08
LaRoche, Eugene R.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
257537, 338309, H01L 2140, H01C 1012
Patent
active
052182258
ABSTRACT:
A class of layout patterns for variable resistors and integrated circuits where the resistance is varied by varying a wiping point on a resistor line; contact is not made into the resistor line itself, but instead all contacts are made only to tabs which extend out from the resistor line. Preferred embodiments use a meander resistor line made of polysilicon within a silicon integrated circuit. Simple processing mask modifications can be used to change the geometry of the meander line to vary the resistance. The wiping point is digitally selected.
REFERENCES:
patent: 4320664 (1982-03-01), Rehn et al.
patent: 4446613 (1984-05-01), Beinglass et al.
patent: 4446613 (1984-05-01), Beinglass et al.
patent: 4695853 (1987-09-01), Hackleman et al.
patent: 4725876 (1988-02-01), Kishi
patent: 4725876 (1988-02-01), Kishi
patent: 4760369 (1988-07-01), Tiku
patent: 4947020 (1990-08-01), Imamura et al.
patent: 4948747 (1990-08-01), Pfiester
patent: 4951118 (1990-08-01), Nakamura
Dallas Semiconductor Corp.
LaRoche Eugene R.
Nguyen Viet Q.
LandOfFree
Thin-film resistor layout does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Thin-film resistor layout, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thin-film resistor layout will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1944461