Thin film resistor head structure and method for reducing...

Semiconductor device manufacturing: process – Making passive device

Reexamination Certificate

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C438S238000, C438S692000, C257SE21004, C257SE21003, C257SE21230, C257SE27155, C257SE27071

Reexamination Certificate

active

11102100

ABSTRACT:
A method of making integrated circuit thin film resistor includes forming a first dielectric layer (18B) over a substrate and providing a structure to reduce variation of head resistivity thereof by forming a dummy fill layer (9A) on the first dielectric layer, and forming a second dielectric layer (18D) over the first dummy fill layer. A thin film resistor (2) is formed on the second dielectric layer (18D). A first inter-level dielectric layer (21A) is formed on the thin film resistor and the second dielectric layer. A first metal layer (22A) is formed on the first inter-level dielectric layer and electrically contacts a portion of the thin film resistor. Preferably, the first dummy fill layer is formed as a repetitive pattern of sections such that the repetitive pattern is symmetrically aligned with respect to multiple edges of the thin-film resistor (2). Preferably, the first dummy fill layer is formed so as to extend sufficiently far beyond ends of the thin-film resistor to ensure only a negligible amount of systematic resistance error due to misalignment.

REFERENCES:
patent: 5924198 (1999-07-01), Swanson et al.
patent: 6618029 (2003-09-01), Ozawa
patent: 6818966 (2004-11-01), Beach et al.

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