Thin-film planar edge-emitter field emission flat panel display

Electric lamp and discharge devices – Discharge devices having a multipointed or serrated edge...

Reexamination Certificate

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C313S351000, C313S355000, C313S306000, C313S496000

Reexamination Certificate

active

06590320

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to flat panel displays (FPD), and in particular, to a flat panel display having an emitter which is formed by edges of thin carbon films
BACKGROUND OF THE INVENTION
Flat panel display manufacturing is one of the fastest growing industries in the world, with a potential to surpass and replace the Cathode Ray Tube industry in the foreseeable future. This will result in a large variety of the FPDs, ranging from very small virtual reality eye tools or displays for cellular phones, to large TV-on-the wall displays, with digital signal processing and high-definition screen resolution.
Some of the more important requirements of FPDs are video rate of the signal processing (moving picture); high resolution typically above 100 DPI (dots per inch); color; high contrast ratios, typically greater than 20; flat panel geometry; high screen brightness, typically above 100 cd/m
2
; and large viewing angle.
At present, liquid crystal displays (LCD) dominate the FPD market. However, although tremendous technological progress has been made in recent years, LCDs still have some drawbacks and limitations which pose significant restraints on the entire industry. First, LCD technology is rather complex, which results in a high manufacturing cost and price of the product. Other deficiencies, such as small viewing angle, low brightness and relatively narrow temperature range of operation, make application of the LCDs difficult in many high market value areas, such as car navigation devices, car computers, and mini-displays for cellular phones.
Other FPD technologies capable of competing with the LCDs, are currently under intense investigation. Among these technologies, plasma displays and field-emission displays (FED) are considered the most promising. Plasma displays employ a plasma discharge in each pixel to produce light. One limitation associated with plasma displays is that the pixel cells for plasma discharge cannot be made very small without affecting neighboring pixel cells. This is why the resolution in a plasma FPD is poor for small format displays but becomes efficient as the display size increases above 30″ diagonal. Another limitation associated with plasma displays is that they tend to be thick. A typical plasma display has a thickness of about 4 inches.
FEDs employ “cold cathodes” which produce mini-electron beams that activate phosphor layers in the pixel. It has been predicted that FEDs will replace LCDs in the future. Currently, many companies are involved in FED development. However, after ten years effort, FEDs are not yet in the market.
FED mass production has been delayed for several reasons. One of these reasons concerns the fabrication the electron emitters. The traditional emitter fabrication is based on forming multiple metal (Molybdenum) tips, see C. A. Spindt “Thin-film Field Emission Cathode”, Journ. Of Appl. Phys, v. 39, 3504, and U.S. Pat. No. 3,755,704 issue to C. A. Spindt. The metal tips concentrate an electric field, activating a field induced auto-electron emission to a positively biased anode. The anode contains light emitting phosphors to produce an image. The technology for fabricating the metal tips, together with controlling gates, is rather complex. In particular, fabrication requires a sub-micron, e-beam, lithography and angled metal deposition in a large base e-beam evaporator, which is not designed for high throughput production.
Another difficulty associated with FED mass production relates to life time of FEDs. The electron strike of the phosphors results in phosphor molecule dissociation and formation in a vacuum chamber of gases, such as sulfur oxide and oxygen. The gas molecules reaching the tips screen the electric field, reducing the efficiency of electron emission from the tips. Another group of gases, produced by electron bombardment, contaminates the phosphor surface and forms undesirable energy band bending at the phosphor surface. This prevents electron-hole diffusion from the surface into the depth of the phosphor grain, reducing the light radiation component of electron-hole recombination from the phosphor. These gas formation processes are interrelated and directly connected with vacuum degradation in the display chamber.
The gas formation processes are most active in the intermediate anode voltage range of 200-1000V. If, however, the voltage is elevated to 6-10 kV, the incoming electrons penetrate deeply into the phosphor grain. In this case, the products of phosphor dissociation are sealed inside the grain and cannot escape into the vacuum. This result significantly increases the life time of the FED and makes it close to that of a conventional cathode ray tube.
The high anode voltage approach is currently accepted by all FED developers. This, however, creates another problem. To apply such a high voltage, the anode must be made on a separate substrate and removed from the emitter a significant distance equaling about 1 mm. Under these conditions, the gate controlling efficiency decreases, and pixel cross-talk becomes a noticeable factor. To prevent this effect, an additional electron beam focusing grid is introduced between the first grid and the anode, see e.g. C. J. Spindt, et al. “Thin CRT Flat-Panel-Display Construction and Operating Characteristics”, SID-98 Digest, p. 99, which further complicates display fabrication.
FIG. 1
illustrates a conventional tip-based pixel FED
10
with an additional electron beam focusing grid
11
. The FED
10
includes an anode
16
and a cathode
12
having a plurality of metal tip-like emitters
13
, a gate
14
made as a film with small holes
15
above the tips of the emitters
13
. The emitters
13
produce mini-electron beams
19
that activate phosphors
17
contained by the anode
16
. The phosphors
17
are coated with a thin film of aluminum
18
. The metal tip-like emitters
13
and holes
15
in the controlling gate
14
, which are less than 1 &mgr;m in diameter, are expensive and time consuming to manufacture, hence they are not readily suited for mass production.
Another approach to FED emitter fabrication involves forming the emitter in the shape of a sharp edge to concentrate the electric field. See U.S. Pat. No. 5,214,347 entitled “Layered Thin-Edge Field Emitter Device” issued to H. F. Gray. The emitter described in this patent is a three-terminal device for operation at 200V and above. The emitter employs a metal film the edge of which operates as an emitter. The anode electrode is fabricated on the same substrate, and is oriented normally to the substrate plane, making it unsuitable for display functions. A remote anode electrode is provided parallel to the substrate, making it suitable for the display purposes. The anode electrode, however, requires a second plate which significantly complicates the fabrication of the display.
Still another approach to FED emitter fabrication can be found in U.S. Pat. No. 5,345,141, entitled “Single Substrate Vacuum Fluorescent Display”, issued to C. D. Moyer et al. which relates to the edge-emitting FED. This patent discloses two pixel structures that use a diamond film as an edge emitter.
FIGS. 2A and 2B
show the two pixel structures similar to those described in U.S. Pat. No. 5,345,141. A diamond film denoted by numerals
20
and
25
in the respective figures, is deposited on top of a metal film
21
,
26
. Since the diamond is an ideal insulator and the only diamond edge exposed is the very top one, as indicated by an arrow “O” in
FIG. 2B
, only a relatively small fringing electric field coming from the metal film
26
underneath the diamond film
25
, contributes to the field emission process from this edge.
Another limitation of the emitter depicted in
FIG. 2A
is that the emitter films, including the diamond film
20
and the insulator film
23
, are grown on a phosphor film
24
, which is known to have a very rough surface morphology that makes its practically unsuitable for any further film deposition on top of it. A further limitation of the pixel structure depicted in
FIG. 2B
, rel

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