Thin film phase-change memory

Details Thin film phase-change memory Thin film phase-change memory

2007-07-24

2007-07-24

Lindsay, Jr., Walter (Department: 2812)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to electromagnetic radiation

C438S096000, C438S098000, C438S102000, C438S199000, C438S381000, C257S369000, C257S379000, C257S380000, C257SE21613, C257SE21617, C257SE21632

Reexamination Certificate

active

11485241

ABSTRACT:
A memory cell comprises a chalcogenide random access memory (CRAM) cell and a CMOS circuit. The CMOS circuit accesses the CRAM cell. The CRAM cell has a cross-sectional area that is determined by a thin film process (e.g., a chalcogenide deposition thin film process) and by an iso-etching process. If desired, the chalcogenide structure may be implemented in series with a semiconductor device such as a diode or a selecting transistor. The diode drives a current through the chalcogenide structure. The selecting transistor drives a current through the chalcogenide structure when enabled by a voltage at a gate terminal of the selecting transistor. The selecting transistor has a gate terminal, a source terminal, and a drain terminal; the gate terminal may be operatively coupled to a word line of a memory array, the source terminal may be operatively coupled to a drive line of the memory array, and the drain terminal may be operatively coupled to a bit line of the memory array.

REFERENCES:
patent: 6873538 (2005-03-01), Hush
patent: 6972429 (2005-12-01), Hsueh et al.
patent: 7071021 (2006-07-01), Harshfield et al.
patent: 2004/0257854 (2004-12-01), Chen et al.
patent: 2005/0027409 (2005-02-01), Marshall et al.

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