Thin film memory cell

Details Thin film memory cell Thin film memory cell

1991-06-25

1994-01-11

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

Field effect device in non-single crystal, or...

257 52, 257 57, 257 69, 257315, 365182, H01L 2904, H01L 31036, H01L 3120, H01L 27108

Patent

active

052784282

ABSTRACT:
A memory cell has a thin film memory transistor and a thin film selective transistor. The thin film memory transistor has a charge trapping structure and a positive-negative-charge occurrence structure. The charge trapping structure includes a first thin film semiconductor layer, an insulating memory gate layer formed on the first thin film semiconductor layer, and a memory gate electrode. The positive-negative-charge occurrence structure includes an impurity high density layer with a portion facing the memory gate electrode. The thin film selective transistor is coupled to the thin film memory transistor in a serial form and has an only n-channel occurrence structure which includes a second thin film semiconductor layer, an insulating selective gate layer formed on the second thin film semiconductor layer and being thicker than the insulating memory gate layer, and a selective gate electrode formed on said insulating selective gate layer.

REFERENCES:
patent: 4590503 (1986-05-01), Harari et al.
patent: 4667217 (1987-05-01), Janning
patent: 4905072 (1990-02-01), Komatsu et al.
patent: 5070378 (1991-12-01), Yamagata

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