Thin film magnetic memory device suppressing influence of...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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C365S158000, C365S171000, C365S206000, C365S226000

Reexamination Certificate

active

06912174

ABSTRACT:
A main power supply line and a main ground wiring provided to supply power from one side (a first direction) of a memory region, a main power supply line and a main ground wiring provided to supply the power from the other side (a second direction opposite to the first direction) of the memory region are provided in a column direction. A bit line driver arranged on one side is supplied with power from one side, and a bit line driver arranged on the other side is supplied with the power from the other side. As a result, no current path is formed in a region of the power supply lines on the selected memory region.

REFERENCES:
patent: 5894447 (1999-04-01), Takashima
patent: 6618317 (2003-09-01), Tsuji et al.
patent: 6795335 (2004-09-01), Hidaka
patent: 6856538 (2005-02-01), Hidaka
patent: 2003/0081450 (2003-05-01), Hidaka
patent: 2003/0235070 (2003-12-01), Ooishi
Scheurlein, et al. “A 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in Each Cell” IEEE International Solid-State Circuits Conference (2000) TA 7.2.
Durlam, et al. “Nonvolatile RAM Based on Magnetic Tunnel Junction Elements” IEEE International Solid-State Circuits Conference (2000) TA 7.3.
Naji, et al. “A 256kb 3.0V 1T1MJT Nonvolatile Magnetoresistive RAM” IEEE International Solid-State Circuits Conference (2001) TA 7.6.

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