Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Magnetic field
Reexamination Certificate
2003-07-24
2004-11-09
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Magnetic field
C257S295000, C257SE27006
Reexamination Certificate
active
06815785
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a thin film magnetic memory device and a manufacturing method therefor and, more particularly, to a thin film magnetic memory device having a structure for miniaturization and a manufacturing method therefor.
2. Description of the Background Art
Research concerning MRAMs (Magnetic Random Access Memories) as next-generation semiconductor devices has been performed in recent years. A so-called one transistor-one MTJ (magnetic tunnel junction)-type memory cell formed of a TMR (tunneling magnetoresistive) element that includes a magnetic tunnel junction (MTJ) and of a transistor for selection of a cell can be cited as an example of the configuration of the memory cell array of an MRAM. In addition, a so-called cross point-type memory cell formed of a TMR element and of a diode for selection of a cell, for example, can be cited as another example.
The memory cell of the MRAM according to a more detailed description of the structure of a one transistor-one MTJ-type memory cell includes: a transistor formed on a semiconductor substrate; a TMR element electrically connected to the transistor via a strap; a digit line extending below the TMR element, with an insulator film interposed between the TMR element located above the digit line and the digit line; and a bit line extending above the TMR element with a buffer layer interposed between the TMR element located below the bit line and the bit line. Thus, a magnetic field generated by making current flow through the digit line and through the bit line is used for changing the magnetic direction of a ferromagnetic layer, which is a free layer, forming the magnetic tunnel junction of the TMR element so that rewrite of the data of the memory cell is performed.
Such an MRAM memory cell is disclosed as a magneto-resistance element in, for example, Japanese Patent Laying-Open No. 2002-204010. The magneto-resistance element disclosed in the above literature includes: a lower electrode/base layer formed on a substrate; a fixed magnetic layer formed on the lower electrode/base layer; a middle layer formed on the fixed magnetic layer; and a free magnetic layer formed on the middle layer. The lamination film formed of these respective layers on the substrate is microscopically processed into a square, mesa-type structure having sides of from 2 &mgr;m to 10 &mgr;m.
In addition, Japanese Patent Laying-Open No. 2002-305290 can be cited as another literature that discloses a memory cell of an MRAM.
Such an MRAM memory cell is formed by performing predetermined photolithographic processes and etching processes. When errors at the time of exposure in photolithographic processes are taken into consideration, however, the width of a strap located in a lower layer, for example, must be greater than the width of a TMR element located in a layer above this strap in order to prevent a shift of lamination structural elements, one on top of the other, that bring into contact with each other at the time of formation. In such a case, it becomes necessary to make the layout area for memory cells large enough to include a margin and a problem arises wherein miniaturization of memory cells cannon be achieved.
In addition, in the case where a TMR element located in a lower layer and a bit line located in a layer above this TMR element, for example, shift each other due to error at the time of exposure in a photolithographic process when they are formed, a condition results in that the contact area between the TMR element and the bit line varies depending on the memory cell. In such a case, the resistance value of the contact portion between the TMR element and the bit line varies depending on the memory cell. Thus, this causes dispersion in the read current at the time of read-out of data from memory cells.
In addition, in the magneto-resistance element disclosed in Japanese Patent Laying-Open No. 2002-204010, a lamination film formed of a free magnetic layer and the like formed on a substrate, that is, the TMR element portion of a memory cell, is processed into a mesa-type structure. In this case, however, the area of the fixed magnetic layer and the area of the free magnetic layer, which sandwich the middle layer, undergo dispersion, depending on the form of the mesa-type structure portion. In addition, a process for forming the mesa-type structure is performed on this lamination film primarily by means of wet etching in order to completely prevent defects such as short circuiting between adjacent TMR elements. It becomes difficult to control the formation of the mesa-type structure in the case, in particular, wherein a wet etching process is used and, therefore, it is considered that dispersion in the area of the fixed magnetic layer and in the area of the free magnetic layer, which sandwich the middle layer, becomes large.
Such dispersion greatly affects the rewrite characteristics of the MRAM. In addition, the contact area between the middle layer and the fixed magnetic layer, as well as the contact area between the middle layer and the free magnetic layer, vary depending on the form of the mesa-type structure and, therefore, the resistance characteristics also vary. Thus, the read current flowing through the TMR element varies and, therefore, the risk arises that read-out errors may be caused at the time of the determination of the 1 or 0 of the data stored in a memory cell based on the read current.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to solve the above described problem and to provide a thin film magnetic memory device realizing miniaturization of memory cells and, also, having a high reliability, and a manufacturing method therefor.
A thin film magnetic memory device according to the present invention includes: a magnetic memory cell, provided on a main surface of a semiconductor substrate, operating as a memory element; a buffer layer having a first surface bringing into contact with the magnetic memory cell and a second surface, located on the side opposite to the first surface, having an area smaller than that of the first surface; and a wire extending in one direction so as to intersect the magnetic memory cell and so as to bring into contact with the second surface.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 6297983 (2001-10-01), Bhattacharyya
patent: 6518588 (2003-02-01), Parkin et al.
patent: P2002-204010 (2002-07-01), None
patent: P2002-305290 (2002-10-01), None
Ho Tu-Tu
McDermott Will & Emery LLP
Nelms David
Renesas Technology Corp.
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