Thin dielectric films for DRAM storage capacitors

Details Thin dielectric films for DRAM storage capacitors Thin dielectric films for DRAM storage capacitors

2000-08-29

2002-10-08

Everhart, Caridad (Department: 2825)

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

C438S004000, C438S608000

Reexamination Certificate

active

06461931

ABSTRACT:

FIELD
The present invention relates generally to integrated capacitors such as are formed in dynamic random access memory (DRAM) arrays, and more particularly to the dielectric films which separate the two capacitor plates.
BACKGROUND
Dynamic random access memory (DRAM) is a type of memory which must be read and refreshed periodically and typically uses a cell structure of one transistor and one capacitor. Despite the disadvantage of periodically refreshing the cells, the cost, flexibility, and density of this memory type has made it a very popular form of semiconductor memory.
FIG. 1
shows a block diagram of an early DRAM architecture.
As device sizes continue to shrink for integrated circuits, newer materials and new methods of forming old materials are increasingly necessary to meet the demands placed on the system. For instance, charge storage cells for 1-4 Gb DRAMs require capacitances on the order of 25 to 30 fF in order to make the cell detectable over the bit line capacitance. Capacitance can be increased by using a thinner capacitor dielectric, using a high-k dielectric (i.e., one with a DC dielectric constant greater than 10), or by increasing the capacitor size, with high-k dielectrics being particularly desirable at this stage. Current DRAM capacitors commonly use silicon dioxide/silicon nitride (ON) dielectrics which have been intensely investigated and optimized to near their practical performance limit. For example, silicon dioxide has a dielectric constant near 3.9, while the dielectric constant of silicon nitride is about 7.0.
Alternative dielectrics are being investigated to meet the need for increased capacitance, including perovskite structures such as barium strontium titanate (BST) or lead zirconium titanium (PZT). However, although these compounds have very high dielectric constants, there is still much to be learned about fabricating capacitors with them, and many current processes that will have to be changed to use these materials.
Some DRAM manufacturers have gone to deposition of tantalum pentoxide (Ta
2
O
5
), which has a dielectric constant of 20-30, depending on how it is prepared. This is not as high as the perovskites, but is a significant improvement over ON dielectrics. Additionally, tantalum pentoxide does not require the major changes in the process flow that other dielectric materials do.
Thin oxides, such as for capacitor dielectrics, are generally deposited, e.g., by metal oxide chemical vapor deposition (MOCVD) or by sputter deposition of a metal in the presence of an oxidizing medium (with the exception of oxides grown from silicon, which may be either grown or deposited). In this situation, however, the composition of the oxide across the thickness of oxide is not homogeneous. When oxidizing bulk metal, such as tantalum, niobium, and the like, unless the metal is completely oxidized, there will be present a sequence of oxides, with the most oxygen rich oxide on the outermost surface on in to the most oxygen lean oxide at the substrate, forming layers of various compositions. All the oxides will form, and will be found looking at a cross section.
When oxides are formed on clean metal surfaces at so-called “low temperatures” (up to roughly 200-300° C. or so, depending on the metal), oxidation rates are initially high (on the order of angstroms/minute) but decrease markedly as the oxides thicken to reach a so-called “limiting thickness” value (X
L
) where the rate is about an Angstrom/day. Depending on the metal, temperature, oxygen pressure, etc., X
L
values vary from about 10 to perhaps 200 Angstrom. In this growth regime, the oxide thickness x increases logarithmically with time t:
 
X=a
(ln
t
)+
b
where b is a constant, depending on the metal, its morphology, and other conditions. In a few cases, the data fit slightly better to a:
x
−1~
ln
t
dependence. Both time dependencies result from the dominating presence of a large (>10
6
volts/cm) electric field across the growing oxide layer. Such fields promote oxidation by lowering activation energies of mobile ion (typically O
−2
) diffusion and arise from electronegativity differences between surface oxygen and unreacted metal. Such differences cause electrons to tunnel from the metal through the oxide to the electrophilic, chemisorbed oxygen moieties on the outer surface. The resultant charge separation over a very small distance produces fields which can substantially enhance the oxidation process at temperatures too low to permit very substantial thermally-induced diffusion. However, electron tunneling diminishes exponentially with increasing x, causing large reductions in the field and dx/dt as x approaches X
L
. For a given metal, higher oxidation temperatures will increase both dx/dt and the ultimate X
L
values realized in the temperature regime where logarithmic growth kinetics are still operative.
However, the total layer construction will typically not be limited to a purely stoichiometric top layer over a purely metallic underlayer. The diffusion of oxygen will normally cause an intermediate region to exist between two such layers. The intermediate region will have a composition which is less than fully oxidized, i.e., which has a fraction of oxygen which is smaller than that of the stoichiometric layer. Such a composition is often referred to as a “suboxide.”
For example, where tantalum is oxidized, the outer layer will be Ta
2
O
5
, but suboxides containing less oxygen will form under this outer layer. Over time, some of the pentoxide will be converted to a suboxide, which degrades the performance of the device.
Oxides need to be crystallized to get maximum dielectric constant. Oxides formed by SD or MOCVD require heating in oxygen to temperatures on the order of 700-800 degrees C. to form. When oxides are made by MOCVD, carbon contaminants are introduced and need to be burned out. The drawback to this is that while such treatments do crystallize the oxide, they also cause oxidation of the silicon substrate, which is unwanted.
There are problems with MOCVD. Maximum oxidation states are typically not achieved in MOCVD processes due to a number of factors including the flow of gasses, gradients, the amount of oxygen used, and the like. Therefore, there are nonuniformities introduced in the process. These nonuniformities include chemical impurities, carbon contamination, and the like. Fragments of the reaction process get into the deposited oxides.
SUMMARY
In one embodiment, a method of forming a dielectric layer includes depositing a first metallic layer on a substrate, and oxidizing the metallic layer to form a first dielectric oxide. A second metallic layer is deposited on the first oxidized layer, and the second metallic layer is oxidized to form a second dielectric oxide different from the first dielectric oxide. In another embodiment, both metallic layers are formed before oxidation.
In another embodiment, a dielectric layer includes an ultrathin partially oxidized layer, a first stoichiometric dielectric oxide layer, and a second stoichiometric dielectric oxide layer of different composition than the first dielectric oxide layer, wherein the first and the second oxide layers are formed in a single oxidation process.
Other embodiments are described and claimed.


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