Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2001-12-12
2004-12-07
Zarabian, Amir (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S012000, C257S013000, C257S014000, C257S016000, C257S467000, C257S633000, C257S712000, C257S930000
Reexamination Certificate
active
06828579
ABSTRACT:
The present invention relates to thermoelectric devices and in particular to very thin lattice thermoelectric devices.
BACKGROUND OF THE INVENTION
Workers in the thermoelectric industry have been attempting too improve performance of thermoelectric devices for the past 20-30 years with not much success. Most of the effort has been directed to reducing the lattice thermal conductivity (K) without adversely affecting the electrical conductivity. Experiments with superlattice quantum well materials have been underway for several years. These materials were discussed in an paper by Gottfried H. Dohler which was published in the November 1983 issue of Scientific American. This article presents an excellent discussion of the theory of enhanced electric conduction in superlattices. These superlattices contain alternating conducting and barrier layers and create quantum wells that improve electrical conductivity. These superlattice quantum well materials are crystals grown by depositing semiconductors in layers whose thicknesses is in the range of a few to up to about 100 angstroms. Thus, each layer is only a few atoms thick. (These quantum well materials are also discussed in articles by Hicks, et al and Harman published in Proceedings of 1992 1st National Thermoelectric Cooler Conference Center for Night Vision & Electro Optics, U.S.Army, Fort Belvoir, Va. The articles project theoretically very high ZT values as the layers are made progressively thinner.) The idea being that these materials might provide very great increases in electric conductivity without adversely affecting Seebeck coefficient or the thermal conductivity. Harmon of Lincoln Labs, operated by MIT has claimed to have produced a superlattice of layers of (Bi,Sb) and Pb(Te,Se). He claims that his preliminary measurements suggest ZTs of 3 to 4.
FIG. 1
shows theoretical calculated values (Sun et al-1998) of ZT plotted as a function of quantum well width.
The present inventors have actually demonstrated that high ZT values can definitely be achieved with Si/Si
0.8
Ge
0.2
superlattice quantum well (See, for example, US Pat. No. 5,550,387.) Most of the efforts to date with superlattices have involved alloys that are known to be good thermoelectric materials for cooling, many of which are difficult to manufacture as superlattices. The present inventors have had issued to them United States patents in 1995 and 1996 which disclose such materials and explain how to make them. These patents (which are hereby incorporated by reference herein) are U.S. Pat. Nos.: 5,436,467, 5,550,387. FIGS. 1A and 1B herein were FIGS. 3 and 5 of the '467 patent. A large number of very thin layers (in the '467 patent, about 250,000 layers) together produce a thermoelectric leg 10 about 0.254 cm thick. In the embodiment shown in the figures all the legs are connected electrically in series using sprayed-on metal layers
14
and otherwise are insulated from each other in an egg-crate type thermoelectric element as shown in FIG.
1
A. As shown by arrows
30
in
FIG. 1B
current flows from the cold side to the hot side through P legs
12
and from the hot side to the cold side through N legs
10
. (Electrons flow in the opposite direction.) These patents disclose superlattice layers comprised of: (1) SiGe as conducting layer and Si as a barrier layer and (2) alternating layers of two different alloys of boron carbide. In the '387 patent Applicants disclose that they had discovered that strain in the layers can have very beneficial effects on thermoelectric properties of the elements disclosed in the '467 patent.
What are needed are better quantum well materials, even better than the ones discussed above, for thermoelectric devices.
SUMMARY OF THE INVENTION
The present invention provides a superlattice thermoelectric device. The device is comprised of p-legs and n-legs, each leg being comprised of a large number of at least two different very thin alternating layers of elements. The n-legs in the device are comprised of alternating layers of silicon and silicon carbide. In preferred embodiments p-legs are comprised of a superlattice of B-C layers, with alternating layers of different stoichiometric forms of B-C. This preferred embodiment is designed to produce 20 Watts with a temperature difference of 300 degrees C. with a module efficiency of about 30 percent. The module is about 1 cm thick with a cross section area of about 7 cm
2
and has about 10,000 sets of n and p legs each set of legs being about 55 microns thick and having about 5,000 very thin layers (each layer about 10 nm thick).
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Elsner Norbert B.
Ghamaty Saied
Hi-Z Technology, Inc.
Ross John R.
Ross, III John R.
Soward Ida M.
Zarabian Amir
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