Thermally optimized interdigitated transistor

Details Thermally optimized interdigitated transistor Thermally optimized interdigitated transistor

1990-11-05

1991-10-15

Carroll, J.

357 28, 357 45, 357 65, 357 68, H01L 2980, H01L 2358, H01L 2710, H01L 2348

Patent

active

050578820

ABSTRACT:
A quasi-interdigitated transistor (50) for rf power applications has a plurality of channel regions (102-118) that are each offset from each other in a y-direction such that a q.sub.x heating component from adjacent channel regions will affect any one channel region to a lesser extent than the q.sub.x from adjacent channel regions in the conventional interdigitated structure. In a preferred embodiment, the channel regions (102-118) are formed in a single, curved, V-shaped row such that the cumulative transverse width of all of the transistor sections is less than the waveguide cutoff frequency. The V-shaped row of transistor sections also provides the advantage of parallel signal paths having approximately the same propagation time delay such that there is no phase cancellation within the device.

REFERENCES:
patent: 3328601 (1967-12-01), Rosenbaum
patent: 4015278 (1977-03-01), Fukuta
patent: 4148046 (1979-07-01), Hendrickson et al.
patent: 4651183 (1987-03-01), Lange et al.
patent: 4695862 (1987-09-01), Kato et al.
L. S. Napoli et al., "High-Power GaAs FET Amplifier-a Multigate Structure", IEEE International Solid-State Conference (Feb. 1973), pp. 82-83.

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