Thermally enhanced semiconductor package

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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C361S688000, C361S704000, C361S705000, C361S706000, C361S713000, C361S718000, C361S719000, C257S706000, C257S717000

Reexamination Certificate

active

06208519

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the packaging of semiconductor devices. More particularly, the present invention relates to a packaged semiconductor device and a method for making it.
BACKGROUND OF THE INVENTION
Semiconductor device packaging techniques are well known. In conventional packaged devices, a die is attached to a substrate, and contacts of each are electrically connected. A heat sink may also be affixed to the die. The die and heat sink are then completely encapsulated, using an overmold (a heated container with a cavity), with a mold material. An example of such a conventional packaged device may be found in U.S. Pat. No. 5,901,041 (Davies et al).
Other conventional methodologies include packaging the die and then adding the heat sink, leaving it exposed. Yet other conventional approaches include taping a heat sink to internal leads of the die and encapsulating the die and heat sink.
Referring now to
FIGS. 1 and 2
, there is shown a conventional packaged semiconductor die assembly
10
including a substrate
22
, a die
12
, a heat sink
40
, and a package molding
50
. The substrate
22
has a first surface
24
and a second surface
26
. An opening
28
extends between the surfaces
24
,
26
.
The die
12
has a first surface
14
, a second surface
16
, and one or more sides
18
. The second surface
16
abuts the first surface
24
of the substrate
22
. Electrical contacts
20
are located on the second surface
16
and are connected to electrical contacts
30
on the second surface
26
of the substrate
22
. The contacts
20
,
30
are connected by wiring
32
which may be printed or bonded.
The heat sink
40
has a first surface
42
, a second surface
44
, and one or more sides
46
. The second surface
44
abuts the first surface
14
of the die
12
. The package molding
50
completely encapsulates the die
12
and the heat sink
40
. Specifically, the sides
18
,
46
and the first surface
42
are covered by the package molding
50
.
One problem with such conventional methodologies is that current overmold techniques generally completely encapsulate the head sink with no surface of the heat sink directly exposed as shown in FIG.
2
. This reduces efficiency of the heat transfer process.
There thus exists a need for a packaged semiconductor device having a heat sink which allows greater heat transfer properties, particularly as the density of components within a die increases and heat build up becomes more of a problem.
SUMMARY OF THE INVENTION
The present invention provides a packaged semiconductor device which includes a substrate, a die connected to said substrate, a heat sink affixed to said die, and a first molding material encapsulating said die and said heat sink, said first molding material leaving exposed substantially an entire upper surface of the said heat sink.
The present invention further provides a molded packaged semiconductor device including a die having first contacts, a substrate connected to the die and having second contacts, the first contacts being connected to respective second contacts, a heat sink, a thermally compliant material adhering the heat sink with the die, and a molding material encapsulating the die, the thermally compliant material, and the substrate, the molding material leaving exposed substantially the entire upper surface of the heat sink.
The present invention further provides a method for packaging a semiconductor device. The method includes affixing a heat sink to a die located on a substrate, and encapsulating the die and the heat sink with a first molding material such that substantially an entire upper surface of the heat sink remains exposed.
These and other advantages and features of the invention will be more readily understood from the following detailed description of the invention which is provided in connection with the accompanying drawings.


REFERENCES:
patent: 5121293 (1992-06-01), Conte
patent: 5227663 (1993-07-01), Patil et al.
patent: 5262927 (1993-11-01), Chia et al.
patent: 5311060 (1994-05-01), Rostoker et al.
patent: 5359768 (1994-11-01), Haley
patent: 5610442 (1997-03-01), Schneider et al.
patent: 5691567 (1997-11-01), Lo et al.
patent: 5705851 (1998-01-01), Mostafazadeh et al.
patent: 5754401 (1998-05-01), Saneinejad et al.
patent: 5883430 (1999-03-01), Johnson
patent: 5898224 (1999-04-01), Akram
patent: 5901041 (1999-05-01), Davies et al.
patent: 5909056 (1999-06-01), Mertol

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