Amplifiers – With semiconductor amplifying device – Including temperature compensation means
Reexamination Certificate
2001-06-25
2003-08-26
Choe, Henry (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including temperature compensation means
C330S310000
Reexamination Certificate
active
06611172
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and/or architecture for implementing amplifiers generally and, more particularly, to high power Darlington feedback amplifiers.
BACKGROUND OF THE INVENTION
Conventional Darlington feedback amplifier topologies have been widely used for high power-bandwidth characteristics. However, Darlington topologies do not lend to thermal emitter ballasting of input transistors without significant RF performance penalty.
Referring to
FIG. 1
, a conventional Darlington feedback amplifier
10
is shown. In power applications, multiple parallel input and output transistors are required in order to provide the current and voltage swings demanded by a given transmitter application. The amplifier
10
is shown without input transistor thermal ballasting. The input transistors Q
1
A and Q
1
B are typically inherently prone to thermal runaway due to the topology. The amplifier
10
allows individual emitter degeneration through the resistors RE
2
A and RE
2
B of the output stage transistors Q
2
A and Q
2
B. However, the input transistors Q
1
A and Q
1
B feed the common-base terminal A of the output stage transistors Q
2
A and Q
2
B and do not perform emitter ballasting. Since both emitters of the input transistors Q
1
A and Q
1
B are tied to the common node A, the resistors RE
1
A and RE
1
B are prevented from effectively ballasting the input transistors Q
1
A and Q
1
B. The amplifier
10
can implement base and emitter ballasting locally about the input transistors Q
1
A and Q
1
B. However, such base and emitter ballasting is achieved at the expense of performance (i.e., gain and noise). The output transistors Q
2
A and Q
2
B are typically configured with emitter degeneration to provide RF feedback as well as emitter ballasting. The configuration prevents the output stage from thermal runaway.
Referring to
FIG. 2
, an infrared thermal scan
20
illustrating the relative and absolute temperature of the active devices on an example GaAs HBT semiconductor chip is shown. The scan
20
illustrates that the input transistors (i.e., six parallel connected HBT devices) have thermal runaway, where two of the devices have apparently “runaway” with the bias current due to positive thermal-electrical feedback. The thermal runaway shown in the scan
20
demonstrates the thermal instability of the input transistors of the conventional Darlington amplifier
10
, which does not naturally lend itself to thermal ballasting on the input stage transistors Q
1
A and Q
1
B. Emitter degeneration or series feedback is typically implemented on the output transistors Q
2
A and Q
2
B to provide thermal stability to an output device (not shown). The output transistors Q
2
A and Q
2
B typically employ emitter ballasting which leads to stable thermal characteristics. The Darlington amplifier
10
traditionally incorporates emitter degeneration of the output transistors Q
2
A and Q
2
B whereas emitter degeneration is not employed on the input transistors Q
1
A and Q
1
B.
Referring to
FIG. 3
, a conventional base ballasting Darlington amplifier
30
is shown. The amplifier
30
employs independent base ballasting of the transistors Q
1
A and Q
1
B. While base ballasting can be locally applied to input transistors Q
1
A and Q
1
B, the value of the base ballasting resistors, RB
1
and RB
2
are typically Beta x N, where N is a resistance value required for proper thermal emitter ballasting. The base ballasting values can range from 50-200 ohms which will significantly degrade bandwidth. The ballasting range also introduces thermal noise at the input of the amplifier
30
. The implementation of base ballasting comes at the expense of increased thermal noise at the input and higher amplifier noise figure sensitivity with temperature. The addition of thermal noise (which is very sensitive to temperature variations) can preclude the use of base ballasting in wireless transmitter applications such as GSM or CATV. GSM is a European cell phone standard which uses constant envelope modulation. Cellular standards generally have a noise performance specification on the power amplifier component. CATV is community access TV which also requires high power but low transmit noise.
Referring to
FIG. 4
, a conventional emitter ballasting Darlington amplifier
40
is shown. Emitter ballasting through the resistors REEA and REEB can be applied to the input transistors Q
1
A and Q
1
B. The amplifier
40
employs emitter ballasting through the resistors REEA and REEB for the transistors Q
1
A and Q
1
B before driving the node A. Such an implementation improves the thermal stability of the input transistors Q
1
A and Q
1
B but at the expense of a drop in voltage gain due to the voltage divider resulting from the emitter ballasting resistor REEA and REEB and bias resistors RE
1
A and RE
1
B.
U.S. Pat. No. 3,813,588, to Ring, entitled “Efficient Power Darlington Device Configuration” relates to a Darlington device layout structure which efficiently implements semiconductor area to construct a Darlington three terminal device. The device incorporates output transistor emitter ballasting. However, it is not apparent that Ring uses emitter ballasting on the input transistors. Ring alludes to an emitter ballasting resistor “positioned adjacent each emitter sub region in the first row.” This is much like the emitter ballasting implementation of the amplifier
40
. Ring '588 addresses a Darlington device configuration where the device may be treated as a single active component transistor.
U.S. Pat. No. 5,541,439, to Mojaradi et al., entitled “Layout For A High Voltage Darlington Pair” employs a Darlington device circular layout configuration for obtaining a high voltage Darlington in a compact area. Mojaradi et al. provide a device oriented layout as opposed to a thermally and physically distributed circuit layout of transistors. Mojaradi et al. do not address emitter ballasting for managing the thermal runaway of the input transistor of the Darlington.
U.S. Pat. No. 5,661,431, to Ueno et al., entitled “Output Circuit In Darlington Configuration” addresses an output stage configuration without integrated ballasting. Ueno et al. address the output circuit off leak characteristics by employing an active topology. Ueno et al. is not applicable to thermal runaway problem except that Ueno uses PMOS devices to control the dynamic operation of the Darlington pair.
U.S. Pat. No. 5,883,542, to Eriksson, entitled “Arrangement For Reducing And Stabilizing The Amplification Of A Darlington-Coupled Output Stage” addresses the bias stabilization of a Darlington device through an active device that provides negative feedback. The circuit of Eriksson will stabilize a runaway input device, but not in the case where the input device has multiple fingers.
Generally, the Darlington amplifiers have been used as a wide band gain block. Avantek's layout of their original Darlington amplifier series, the MSAs, show that they do not ballast the input transistor fingers. Ballasting could not have been required because of the lower power capability of those parts as well as the use of silicon which is more thermally conductive than GaAs. The conventional approaches that use localized emitter and base ballasting are obvious techniques that can be employed with the input stage transistor of the Darlington amplifier.
It would be desirable to provide a thermally distributed Darlington topology to address thermal management problems associated with an inferior thermally conductive technology such as GaAs HBTs. Moreover, it would be desirable to provide good thermal ballasting, but without adversely affecting electrical performance. Furthermore, it would be desirable to provide an amplifier with an emitter ballasted for thermally and spatially distributing device hot spots of individual input transistors. It would also be desirable to provide a circuit layout topology to implement such distribution.
SUMMARY OF THE INVENTION
The present invention concerns a Darlington amplifier comprising a first stage and a sec
Fariss Stephen Todd
Kobayashi Kevin Wesley
Choe Henry
Sirenza Microdevices, Inc.
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