Thermally compensated shadow mask

Metal working – Method of mechanical manufacture – Assembling or joining

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Details

118504, 204192E, 204298, 4272481, 427250, 427255, 427299, H01L 500, H01L 710, H01L 754

Patent

active

043910343

ABSTRACT:
In vacuum sputter cleaning and plating operations forming a patterned metallic layer on a silicon semiconductor chip, alignment is maintained by anticipating the difference in thermal expansion between the molybdenum mask and the silicon chip and forming the apertures in the molybdenum mask in a radially offset position with respect to the intended cleaning and deposition locations on the semiconductor chip, when the mask and the chip are at room temperature. Then, when the mask and the silicon chip are maintained in a concentric position and are raised to the cleaning and deposition temperature, the differential expansion of the molybdenum mask will bring the apertures therein into perfect alignment with the intended deposition locations on the silicon wafer.

REFERENCES:
patent: 3117025 (1964-01-01), Learn et al.
patent: 3401055 (1968-09-01), Langdon et al.
patent: 3410774 (1968-11-01), Barson et al.
patent: 3526555 (1970-09-01), Alexander
patent: 3664295 (1972-05-01), Ng et al.
patent: 3897324 (1975-07-01), Del Monte et al.
patent: 4096821 (1978-06-01), Greeneich et al.
patent: 4278710 (1981-07-01), Jelks
Krongelb, S., "Evaporation Mask for Mask Changing and Registration Under Vacuum", IBM Tech. Discl. Bulletin, vol. 14, No. 3, Aug. 1971, pp. 772-773.
IBM Tech. Disclosure Bulletin, vol. 19, No. 7, Dec. 1976, p. 2517.

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