Thermal shutdown circuit

Details Thermal shutdown circuit Thermal shutdown circuit

2002-08-29

2004-11-09

Sircus, Brian (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Circuit interruption by thermal sensing

C361S093800, C374S163000

Reexamination Certificate

active

06816351

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to electronic protection circuits, and more particularly to thermal shutdown circuits.
BACKGROUND OF THE INVENTION
Modern electronic circuits contain thermal shutdown circuits for reducing power dissipation and overheating in electronic circuits. An example of such a thermal shutdown circuit
100
is shown in FIG.
1
.
FIG. 1
is a schematic of a conventional thermal shutdown circuit (
100
). The thermal shutdown circuit
100
includes resistors R
1
through R
5
, transistors Q
1
through Q
5
, transistors M
1
through M
3
, and inverters X
1
through X
3
.
Resistor R
1
is coupled between node VREG and node N
1
. An emitter of transistor Q
1
is coupled to node N
1
. A base and a first collector of transistor Q
1
is coupled to node N
2
. A second collector of transistor Q
1
is coupled to node N
3
. A collector of transistor Q
2
is coupled to node N
2
. A base of transistor Q
2
is coupled to node VBG. An emitter of transistor Q
2
is coupled to node N
4
. Resistor R
2
is coupled between node N
4
and a voltage reference such as ground (“ground”). A collector and a base of transistor Q
3
are coupled to node N
3
. An emitter of transistor Q
3
is coupled to ground. Resistor R
3
is coupled between node VREG and node N
5
. Resistor R
4
is coupled between node N
5
and node N
6
. A collector of transistor Q
4
is coupled to node N
6
. A base of transistor Q
4
is coupled to node N
3
. An emitter of transistor Q
4
is coupled to node N
7
. Resistor R
5
is coupled between node N
7
and ground. A source of transistor M
1
is coupled to node VREG. A drain of transistor M
1
is coupled to node N
5
. A gate of transistor M
1
is coupled to node TSH.
An emitter of transistor Q
5
is coupled to node VREG. A base of transistor Q
5
is coupled to node N
6
. A collector of transistor QS is coupled to node N
8
. A drain and a gate of transistor M
2
are coupled to node N
8
. A source of transistor M
2
is coupled to ground. A gate of transistor M
3
is coupled to node N
8
. A source of transistor M
3
is coupled to ground. A drain of transistor M
3
is coupled to current source X
11
. An input of inverter X
1
is coupled to current source X
11
. An output of inverter X
1
is coupled to node N
9
. An input of inverter X
2
is coupled to node N
9
. An output of inverter X
2
is coupled to node N
10
. An input of inverter X
3
is coupled to node N
10
. An output of inverter X
3
is coupled to node TSH.
Transistor Q
2
is used to develop a reference current. The reference current is used to set a voltage drop across resistors R
3
and R
4
. Transistor Q
5
is turned off (i.e., does not conduct current) when the VBE of transistor Q
5
is greater than the voltage drop across resistors R
3
and R
4
. The VBE of transistor Q
5
is decreased in response to an increase in temperature. When the VBE of transistor Q
5
is equal to the voltage drop across resistors R
3
and R
4
, transistor Q
5
is activated and draws a current. Transistor Q
5
induces a current in transistor M
2
, which is reflected in transistor M
3
. The current flowing through transistor M
3
pulls the input of inverter X
1
low, which drives the output (TSH) of inverter X
3
high. The signal at node TSH is used to turn off circuitry that potentially produces excessive amounts of heat.
SUMMARY OF THE INVENTION
The present invention is directed towards a circuit for providing a thermal shutdown signal in response to an overtemperature condition. The thermal shutdown circuit is typically implemented in the same die as the circuitry that is to be protected. The thermal shutdown circuit provides a first current in response to a change in temperature when a VBE associated with a transistor decreases below a predetermined level. The first current is mirrored to provide a scaled current. A thermal shutdown signal is activated when the scaled current becomes greater than a reference current. The first current is increased in response to the activated thermal shutdown signal such that the thermal shutdown circuit is deactivated at a temperature that is lower than the temperature at which the circuit is activated. The thermal shutdown circuit is deactivated when the temperature of the die decreases.
A more complete appreciation of the present invention and its improvements can be obtained by reference to the accompanying drawings, which are briefly summarized below, to the following detailed description of illustrated embodiments of the invention, and to the appended claims.


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