Thermal/electrical break for printed circuit boards

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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Details

C174S261000, C174S260000, C174S262000, C174S255000

Reexamination Certificate

active

06235994

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to multi-layer circuit boards and circuit cards and to controlling heat flow through the circuit boards and circuit cards. More particularly, the present invention relates to a thermal and/or electrical break for circuit boards and circuit cards.
BACKGROUND OF THE INVENTION
During assembly and rework of a circuit board, the process of removing components from and reattaching components to a circuit board, a proper temperature should be maintained to permit the solder to reach and remain at its reflow temperature. For this to occur, the applied heat must be prevented from dissipating through the circuit board to adjacent components where the heat can cause potentially damaging stress to the circuit board or card and attached components.
It is common to mount complex electronic components on printed boards by inserting pins extending from components into plated through holes in the circuit board and soldering them in place. The plated through holes normally provide connections between the pins and conductive material situated at various levels of the circuit board or card.
As the number of components attached to the circuit board increases, both the number of pins and the number of times the board must be heated to solder the pins in place may increase. Therefore, during assembly and/or rework, a great amount of heat is potentially applied to a circuit board or card.
As the circuit board increases in size and thickness, the total amount of copper and the number of planes common to a single via all contribute to insufficient soldering and the inability to assemble and/or rework a component. Further, the soldering process is adversely affected when tied planes in a circuit board or circuit card, that is, planes in the circuit board or card that are electrically connected to the through hole, allow heat being applied to the plated through hole to escape into the internal planes of the circuit board. The escape of heat from the through hole reduces the through hole temperature to below the solder melting point resulting in insufficient hole fill.
The draining of heat from the through hole is especially prevalent when two or more planes are common to a single through hole. This allows heat to escape into the internal planes of the circuit board or circuit card from the plated through hole, thereby inhibiting the top surface of the carrier from reaching the solder reflow temperature. Thicker circuit boards and circuit cards that do not have common power planes may also experience assembly and/or rework problems. It may be essential that when heat is applied to the circuit board during assembly and/or rework that the temperature not be such that it could melt, burn, or char material used to form the circuit board or circuit card. However, enough heat must be applied to the solder to cause the solder to melt throughout the length of the plated through hole.
FIG. 1
illustrates a known thermal break design that may be used in the connection of plated through holes to power and ground planes in circuit boards and circuit cards to permit electrical connection between the planes and the plated through hole and minimize thermal conduction of heat during assembly and/or rework operations. The thermal break shown in
FIG. 1
includes 4 spokes extending through the thermal break to electrically connect the plated through hole to power/ground planes. To be thermally effective, the spokes preferably are long, thus requiring a large area around the plate through hole or the thermal break.
SUMMARY OF THE INVENTION
An advantage of the present invention is that it provides a long thermal path in a thermal break while minimizing the area taken up by the thermal break.
Another advantage of the present invention is that it enhances thermal benefits while reducing the impact on the electrical performance of signal lines adjacent to plated through holes.
An additional advantage of the present invention is that it minimizes the amount of materials removed around plated through holes.
Furthermore, the present invention may maximize the electrical path length from the plated through holes to power/ground planes.
In accordance with these and other advantages and objectives, the present invention provides a multi-layer printed circuit board or circuit card including at least one layer of an electrically conducting material and at least one layer of an electrically insulating material. At least one through hole is formed at least through the at least one layer of electrically conducting material of the circuit board or circuit card. The at least one through hole includes a material plated on an interior surface thereof. At least one thermal break is provided in the at least one layer of electrically conducting material. The at least one thermal break is provided such that heat passing between the through hole and the at least one layer of electrically conducting material passes through the at least one thermal break. At least one electrical connection is provided in the at least one layer of electrically conducting material between the material plated on the interior surface of the through hole and the at least one layer of electrically conducting material. Also, at least a portion of the at least one electrical connection is between the through hole and the at least one thermal break.
Other aspects of the present invention provide electronic packages. The packages include a multi-layer printed circuit board including at least one layer of an electrically conducting and at least one layer of an electrically insulating material. At least one through hole is formed at least through the at least one layer of electrically conducting material. The at least one through hole includes a material plated on an interior surface thereof. At least one thermal break is provided in the at least one layer of electrically conducting material, such that heat passing between the through hole and the at least one layer of electrically conducting material passes through the at least one thermal break. At least one electrical connection is provided in provided in the at least one layer of electrically conducting material between the material plated on the interior surface of the through hole and the at least one layer of electrically conducting material. At least a portion of the at least one electrical connection is between the through hole and the at least one thermal break. The package also includes at least one component attached to the circuit board. The component includes at least one pin arranged in and joined to the at least one through hole.
Aspects of the present invention also provide methods for assembly and/or rework of multi-layer circuit boards and electronic packages described above.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the present invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the present invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.


REFERENCES:
patent: 3528173 (1970-09-01), Gall
patent: 3530229 (1970-09-01), Burke, Jr.
patent: 3564115 (1971-02-01), Gribble et al.
patent: 4187388 (1980-02-01), Roberts
patent: 5363280 (1994-11-01), Chobot et al.
patent: 5371653 (1994-12-01), Kametani et al.
patent: 5451720 (1995-09-01), Estes et al.
patent: 5473813 (1995-12-01), Chobot et al.
patent: 5495210 (1996-02-01), Forterre et al.
patent: 5590030 (1996-12-01), Kametani et al.

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