Thermal dissipation package for an electrical surface mount...

Details Thermal dissipation package for an electrical surface mount... Thermal dissipation package for an electrical surface mount...

2003-06-10

2004-08-31

Ngo, Hung V. (Department: 2831)

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

C257S575000, C257S713000, C361S719000

Reexamination Certificate

active

06784366

ABSTRACT:

TECHNICAL FIELD
This invention relates in general to electronic surface mount components, and more particularly to the thermal dissipation packaging of such components.
BACKGROUND
Electrical surface mount components facilitate the manufacturing of electronic products. Existing surface mount power transistor packages attempt to combine small size, low cost, and high thermal dissipation. These packages, however, face challenges in providing adequate heat sinking for the active device. Decreases in gain, increases in current drain, and reduced transistor life are all issues when designing high power transistor packages.
FIG. 1
is a bottom view of a prior art field effect transistor (FET) package
100
having drain
102
, gate
104
and source
106
contacts formed about a plastic molded package
110
. The small size of package
100
is beneficial to cost and electrical performance, but thermal dissipation is severely hampered by the necessity to remove heat from the device. To heat-sink package
100
, the source contact
106
is coupled to a bottom metalized surface
108
which provides a ground surface area through which to dissipate heat. When mounted to a printed circuit board (PCB)
802
, shown in
FIG. 8
, metalized surface
108
aligns with solder filled vias
804
and heat spreader
806
to draw heat away from the package
100
. Thus, the heat sinking capability of package
100
is limited to the bottom of the device.
There have been attempts to avoid the disadvantages of heat sinking through a PC board, some more successful than others. One attempt turns a traditional leaded surface mount part upside down and folds the electrical connection leads underneath the part to make contact with exposed metal from above. The main disadvantage to this approach, and that of others, is that the leads are so long that significant parasitic inductance affects the electrical performance of the circuit.
Accordingly, a package that would enhance thermal dissipation capability would be highly desirable.


REFERENCES:
patent: 2001/0050429 (2001-12-01), Ashdown

Affiliated with

Also associated with

Rating

Thermal dissipation package for an electrical surface mount... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Thermal dissipation package for an electrical surface mount..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thermal dissipation package for an electrical surface mount... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3338585