Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
1999-08-26
2001-02-27
Picard, Leo P. (Department: 2835)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S688000, C361S707000, C361S717000, C361S718000, C257S666000, C257S670000, C257S706000, C165S080200, C165S185000
Reexamination Certificate
active
06195258
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the structure of a thermal board used for bonding wires in semiconductor manufacturing process, and more particularly, to such a thermal board which can provide high temperature to increase the wire bonding efficiency while preventing the die paddle of a lead frame from being oxidized.
2. Description of Related Art
In a semiconductor manufacturing process, semiconductor dies are generally mounted on lead frames for coupling to external circuitry. Such lead frames are arranged consecutively in a long strip. A fragmentary portion of such a lead frame strip showing one lead frame (
80
) is illustrated in
FIG. 5
The lead frame (
80
) has a die paddle (
81
) to which a die (
83
) is secured, and a plurality of lead frame fingers radically disposed in a finger zone (
82
) around the die paddle (
81
). The die paddle (
81
) is not connected with the finger zone (
82
) but supported by four interconnection strips (
810
) provided at four corners of the die paddle (
81
), respectively. As the die (
83
) is secured to the die paddle (
81
), a thermal board (
90
) and a position board (
84
) have to be employed to bond wires between the die (
83
) and the lead frame (
80
) so that the die (
83
) is electrically connected to the lead frame fingers of the finger zone (
82
).
The thermal board (
90
) is of a rectangular shape. A shallow slot (
91
) is defined in a flat upper face of the thermal board (
90
). The shallow slot (
91
) has a dimension just to fit the die paddle (
81
) of the lead frame (
80
). At four corners of the shallow slot (
91
), there are four position slot (
910
) defined for corresponding to the interconnection strips (
810
). When the lead frame (
80
) is placed on the thermal board (
90
), as shown in
FIG. 6
, the die paddle (
81
) is received in the shallow slot (
91
) and the lower face of the die paddle (
81
) directly contacts with the bottom face of the shallow slot (
91
). Each interconnection strip (
810
) of the lead frame (
80
) is received in a corresponding position slot (
910
) so that the die paddle (
81
) and the finger zone (
82
) can be located in a proper position. Then, the position board (
84
) is suppressed on the lead frame (
80
) to further securely locate the die paddle (
81
) and the finger zone (
82
). The position board (
84
) has an operation window (
840
) defined in such a manner that the die paddle (
81
) and the inner portion of the finger zone (
82
) are exposed via the operation window (
840
).
After the lead frame (
80
) is secured to the thermal board (
90
) by suppressing the position board (
84
) onto the lead frame (
80
). Wire bonding process can be executed to bond wires from the die (
83
) to the corresponding lead frame fingers of the finger zone (
82
). To increase the efficiency of wire bonding process, the thermal board (
90
) has to be heated so that heat can be transferred from the thermal board (
90
) to the finger zone (
82
) of the lead frame (
80
). As a result, the finger zone (
82
) is heated to a high temperature status and the wires extended from the die (
83
) can be easily welded to the lead frame finger.
It is known that the higher the temperature of the thermal board (
90
) is, the easier the wire bonding process is. However, the high temperature of the thermal board (
90
) may cause a problem to the semiconductor manufacturing process. Such a problem raised because the lead frame (
80
) is made of copper that is easy to be oxidized in high temperature. As the die paddle (
81
) of the lead frame (
80
) is corresponding to the shallow slot (
91
) of the thermal board (
90
) and directly contacts with the bottom face of the shallow slot (
91
), the die paddle (
81
) is also heated when the finger zone (
82
) is heated by the thermal board (
90
). Therefore, the die paddle (
81
) is likely to be oxidized, especially when the thermal board (
90
) is heated to have a temperature of about 200° C. Such an oxidized paddle (
81
) suffers a disadvantage that it may be delaminated from an encapsulant after packaging in a semiconductor device. Therefore, the increase of the temperature to the thermal board (
90
) is restricted and the wire bonding efficiency can not be enhanced. Accordingly, there is a desire to have a thermal board which can provide high temperature to increase the wire bonding efficiency while preventing the die paddle from being oxidized.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a thermal board used for bonding wires in semiconductor manufacturing process for providing high temperature to increase the wire bonding efficiency while preventing the die paddle of a lead frame from being oxidized.
In accordance with one aspect of the present invention, a thermal board is provided, which has a base board and a platform disposed on the base board. The platform has a center portion defined therein a chamber to receive the die paddle. A plurality of supporting posts are formed on the bottom of the chamber to support the die paddle.
In accordance with another aspect of the present invention, a thermal board is provided, which has a base board having an upper face defined therein a chamber (
23
) to receive the die paddle, and a plurality of supporting post formed on the bottom of the chamber to support the die paddle.
REFERENCES:
patent: 4829403 (1989-05-01), Harding
patent: 5394298 (1995-02-01), Sagisaka
patent: 5448105 (1995-09-01), Katoh et al.
patent: 5822848 (1998-10-01), Chiang
patent: 5915166 (1999-06-01), Corisis et al.
patent: 5936837 (1999-08-01), Scribner et al.
Tsai Yu-Fang
Wang Chin-Chen
Advanced Semiconductor Engineering Inc.
Chervinsky Boris L.
Kolisch Hartwell Dickinson & McCormack & Heuser
Picard Leo P.
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