Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Patent
1997-05-23
1998-10-13
Thomas, Tom
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
257903, 257350, 257 69, H01L 27108, H01L 2976, H01L 2701, H01L 2711
Patent
active
058215646
ABSTRACT:
A PMOS thin film transistor (TFT) with self-align offset region for SRAM application is described. A source and a drain regions are above the gate region. A channel region is formed offset from the gate. An offset region is formed in the channel region having a length of 0.3 to 0.4 .mu.m. The key point of the present invention is the novel offset design of PMOS-TFT as load elements in an SRAM cell. Unlike the conventional offset design which is outside the gate, the offset region of the present invention is a disconnection region inside the gate which can be easily formed by so called self-align technique. Since the gate has a disconnected portion in the offset region, the trench-like profile of the offset region makes the load resistance in the offset region much higher to effectively reduce the leakage current.
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Failure in CMOS circuits induced by hot carriers in multi-gate transistors. New York, NY, USA: IEEE, 1988, pp. 26-29, Apr. 12-14, 1988.
Chang Thomas
Kao Jung-Cheng
Wu Hsiao-Chia
Mosel Vitelic Inc.
Nguyen Cuong Quan
Thomas Tom
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