Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2001-01-22
2002-01-15
Brown, Glenn W. (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C702S170000
Reexamination Certificate
active
06339339
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to thin film transistors (TFT) and methods of evaluating reliability thereof, and more specifically, to a TFT including a channel layer of a silicon thin film and a gate insulating film of a silicon oxide film, and a method of evaluating reliability thereof.
2. Description of the Background Art
TFTs are used for load transistors in the memory cells of a static random access memory (SRAM) or driver transistors for liquid crystal television pixels. When such products incorporated with TFTs are marketed, the reliability of TFTs should be evaluated.
In
FIG. 22
, a typical top gate type P channel TFT is illustrated in a schematic cross section. In the TFT, an insulating film
2
a
is formed on a substrate
1
. A polysilicon film
3
is formed on insulating film
2
a
. Polysilicon film
3
may be replaced with a monocrystalline silicon film or an amorphous silicon film. Source/drain regions
4
and a channel region
5
are included in polysilicon layer
3
. A gate electrode
7
is formed on polysilicon layer
3
with a gate insulating film
6
of a silicon oxide film therebetween. Polysilicon layer
3
and gate electrode
7
are covered with a silicon oxide film
2
b
. An aluminum interconnection
8
is connected to each of source/drain regions
4
through a contact hole provided in silicon oxide film
2
b
. More specifically, the TFT in
FIG. 22
is an MOS (Metal Oxide Semiconductor) type PET (Field Effect Transistor) with polysilicon layer
3
serving as an active region.
For reliability evaluation tests for the TFT as illustrated in
FIG. 22
, a hot carrier stress test, a breakdown voltage test for gate insulating film
6
or the like have been conducted.
FIG. 23
sets forth one example of a bias condition in such a hot carrier stress test. In this example, source voltage V
S
applied to source S is 0V, gate voltage V
G
applied to gate G is −7V, drain voltage V
D
applied to drain D is −7V, and current continues to be passed between source S and drain D for a long period of time. It has been established that if polysilicon film
3
is sufficiently hydrogenated, the electrical characteristic of the TFT hardly changes before and after such a hot carrier stress test (see International Reliability Physics Society Proceedings, 1992, pp. 63-67).
In
FIG. 24
, one example of a breakdown voltage evaluation test for a gate insulating film in a TFT is illustrated. In this example, for V
S
=V
D
=0V gate voltage V
G
is gradually changed from 0V toward negative voltage. At the time, the gate voltage V
G
at which gate insulating film
6
is broken down is called gate breakdown voltage. When a silicon oxide film as thick as 250 Å is used for a gate insulating film, the gate breakdown voltage is about 25V. For a power supply voltage of 5V, a gate breakdown voltage of 25V would be enough. The insulation breakdown voltage of a silicon oxide film is generally about 10 MV/cm expressed in electric field, and a breakdown voltage for a gate insulating film having an arbitrary thickness can be estimated from the value of the electric field.
It has been known that in a bulk silicon monocrystalline MOSFET the characteristic of the bulk MOSFET slightly degrades by a −BT (negative bias temperature) stress test by which the gate is supplied with constant voltage V
G
and maintained at an elevated constant temperature T.
The influence of −BT stress however is not exactly known. TFTs are therefore incorporated in SRAMs and the like and marketed without reliability evaluation by −BT stress tests.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to ascertain the influence of −BT stress upon a TFT and establish a method of evaluating reliability concerning the degradation of the characteristic of a TFT due to −BT stress.
Another object of the invention is to provide a TFT satisfying reliability required in a −BT stress state based on thus established method of evaluating the reliability of a TFT due to −BT stress.
A method of evaluating the reliability of a TFT according to a first aspect of the invention, in a TFT having a channel layer of a silicon thin film and a gate insulating film of a silicon oxide film , evaluates the reliability of the TFT in the −BT stress state in which the gate is supplied with an arbitrary negative constant voltage V
G
and maintained at an arbitrary constant temperature T based on the following expressions:
&Dgr;V
th
∝t
&agr;
(3a)
Δ
V
th
∝
exp
qd
&LeftBracketingBar;
V
G
&RightBracketingBar;
2
kTt
ox
(4a)
Δ
V
th
∝
exp
{
-
q
kT
(
φ
0
-
d
&LeftBracketingBar;
V
G
&RightBracketingBar;
2
t
ox
)
}
(5a)
Δ
V
th
=
Δ
V
th0
(
t
t
0
)
α
exp
{
-
q
kT
(
φ
0
-
d
&LeftBracketingBar;
V
G
&RightBracketingBar;
2
t
ox
)
}
(
6
)
τ
=
t
0
(
Δ
V
th
τ
Δ
V
th0
)
β
exp
β
q
φ
0
kT
exp
(
-
β
qd
&LeftBracketingBar;
V
G
&RightBracketingBar;
2
kTt
OX
)
(
8
)
where &Dgr;V
th
represents the threshold voltage shift amount of the TFT, t time, &agr; time coefficient, q elementary electric charge, d voltage coefficient, k Boltzmann constant, t
ox
the thickness of the gate oxide film , &phgr;
0
temperature coefficient, and &Dgr;V
th&tgr;
tolerant threshold voltage shift amount for the TFT, and &bgr;=1/&agr;. The method includes a step of determining time coefficient &agr; in expression (3a) based on the relation between threshold voltage shift amount &Dgr;V
th
obtained from at least one −BT stress test and time t, a step of determining voltage coefficient d in expression (4) based on the relation between threshold voltage shift amounts &Dgr;V
th
obtained from at least two −BT stress tests and applied different gate voltages V
G
, a step of determining temperature coefficient &phgr;
0
in expression (5a) based on the relation between threshold voltage shift amounts &Dgr;V
th
obtained from at least two −BT stress tests and applied different temperatures T, and a step of determining a constant of proportion given as follows using the determined time coefficient &agr;, voltage coefficient d, and temperature coefficient &phgr;
0
determined in expression (6) obtained from the relation between expression (3a), (4a), and (5a),
Δ
V
th0
(
1
t
0
)
α
≡
C
2
and is characterized in that the life of a TFT is produced from expression (8) obtained by modifying expression (6) from the determined constant proportion c
2
and tolerant threshold voltage shift amount &Dgr;V
th&tgr;
.
A method of evaluating the reliability of a TFT according to a second aspect of the invention, in a TFT having a channel layer of a silicon thin film and a gate insulating film of a silicon oxide film , evaluates the reliability of the TFT in the −BT stress state in which the gate is supplied with an arbitrary constant voltage V
G
and held at a predetermined constant temperature T based on the following expressions:
&Dgr;V
th
∝t
&agr;
(3a)
Δ
V
th
∝
exp
qd
&LeftBracketingBar;
V
G
&RightBracketingBar;
2
kTt
ox
(4a)
Δ
V
th
=
Δ
V
th0
(
t
t
0
)
α
exp
qd
&LeftBracketingBar;
V
G
&RightBracketingBar;
2
kT
0
t
OX
(6b)
τ
=
t
0
(
Δ
V
th
τ
Δ
V
th0
)
β
exp
(
Brown Glenn W.
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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