Textured polysilicon stacked trench capacitor

Details Textured polysilicon stacked trench capacitor Textured polysilicon stacked trench capacitor

1991-12-11

1993-03-02

Griffin, Donald A.

Electricity: electrical systems and devices

Electrostatic capacitors

Fixed capacitor

257304, 257309, 437 49, 437203, H01G 406, H01L 2992

Patent

active

051915090

ABSTRACT:
A trench capacitor structure suitable for inclusion in integrated circuit devices and method for forming the same provides increased electrode surface area and capacitance by means of a textured surface of one of the capacitor electrodes. The textured surface is achieved by differentially etching grain boundaries of a doped polysilicon layer or by direct deposition of hemispherical grain polysilicon to form the electrode. Additional capacitance and contact area can be obtained by additional etching of the trench bottom prior to electrode deposition and dielectric growth.

REFERENCES:
"A Capacitor-Over-Bit-Line (COB) Cell with a Hemispherical-Grain Storage Node for 64 Mb Drams" by Sakao et al., pp. 27.3.1 through 27.3.4.
"Rugged Surface Poly-Si Electrode and Low Temperature Deposited SI.sub.3 N.sub.4 for 64-Megabyte and Beyond STC Dram Cell" by Yoshimaru et al., pp. 27.4.1 through 27.4.4.
"Electrical Characterization of Textured Interpoly Capacitors for Advanced Stacked Drams" by Fazan et al., pp. 27.5.1 through 27.5.3.

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