Testing of integrated circuits using clock bursts

Details Testing of integrated circuits using clock bursts Testing of integrated circuits using clock bursts

1991-07-11

1993-01-05

Karlsen, Ernest F.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

364578, 371 251, G01R 3128

Patent

active

051774402

ABSTRACT:
A method of testing integrated circuits at high operating speeds is provided which is applicable to sequential logic circuits such as ASICs. A general purpose ASIC tester applies test vectors to the integrated circuit under test. The logic input signals are held unchanged and a series of high speed clock signals (a clock burst) are applied to the clock terminals of the integrated circuit. These clock signals are provided at the speed at which it is desired to test the integrated circuit. Then the output terminals are observed to determined if the device is in the expected state (as determined by simulation) after the clock burst. The process is repeated until no further output terminals change state, and then the device may be reinitialized and another series of state changes initiated. Thus every path in the circuit may be tested at high speed by a conventional low speed tester.

REFERENCES:
patent: 4280060 (1981-07-01), Kure-Jensen et al.
patent: 4724380 (1988-02-01), Burrouk et al.
patent: 4730156 (1988-03-01), Matsuda

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