Patent
1997-05-16
1999-11-23
Teska, Kevin J.
39550034, 39550035, G06F 9455
Patent
active
059915293
ABSTRACT:
A technique for testing a hardware implementation of an integrated circuit design using test algorithms developed for testing a software model of the integrated circuit design. A software model is created for a design of the integrated circuit. The software model is a software algorithm that emulates behavior of the integrated circuit. In addition, a virtual environment for the software model is also constructed. The virtual environment is a software algorithm that emulates an actual environment anticipated for the integrated circuit. Diagnostic tests are performed on the software model while it is operating in the virtual environment. These tests are used to verify and analyze the design for the integrated circuit. Based upon the results of the diagnostic tests, the design is modified as necessary. Once the design for the integrated circuit has been verified by testing the software model, an actual hardware circuit is constructed that implements the software model. In addition, an actual hardware environment is constructed that implements the virtual environment. Accordingly, the software model and the virtual environment are transformed into equivalent hardware circuits. Because of the equivalency between the software model and the hardware circuit and between the virtual environment with the hardware environment, the same diagnostic tests that were used to verify and analyze the software model in the virtual environment can be used to verify and analyze the hardware circuit in the hardware environment. This results in good test coverage for the integrated circuit design and reduced expense for developing the diagnostic tests.
REFERENCES:
patent: 4638246 (1987-01-01), Blank et al.
patent: 4744084 (1988-05-01), Beck et al.
patent: 4768196 (1988-08-01), Jou et al.
patent: 4811345 (1989-03-01), Johnson
patent: 4937770 (1990-06-01), Samuels et al.
patent: 4945503 (1990-07-01), Takasaki
patent: 5109353 (1992-04-01), Sample et al.
patent: 5134701 (1992-07-01), Mueller et al.
patent: 5146460 (1992-09-01), Ackerman et al.
patent: 5235530 (1993-08-01), Herz et al.
patent: 5329470 (1994-07-01), Sample et al.
patent: 5371878 (1994-12-01), Coker
patent: 5438673 (1995-08-01), Court et al.
patent: 5477475 (1995-12-01), Sample et al.
patent: 5546562 (1996-08-01), Patel
Srivastava & Palavali, "Integration of SPICE with TEK LV511 ASIC Design Verification System," IEEE Proceedings of the 36th Midwest Symposium on Circuits and Systems, pp. 673-676, 1993.
Chue Harry M.
Cox Steven R.
Broda Samuel
Sony Corporation
Sony Electronics Inc.
Teska Kevin J.
LandOfFree
Testing of hardware by using a hardware system environment that does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Testing of hardware by using a hardware system environment that , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Testing of hardware by using a hardware system environment that will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1232297