Testing integrated circuits provided on a carrier

Details Testing integrated circuits provided on a carrier Testing integrated circuits provided on a carrier

1995-05-23

1997-08-12

Baker, Stephen M.

Excavating

G01R 31317, G01R 313185

Patent

active

056573294

ABSTRACT:
A method as described for testing integrated circuits provided on a carrier. They comprise a series input (22) and a series output (24) for test and result patterns. A mode control register (30) is further present to receive a mode control signal train via the serial input. Under the control of said mode control signal train the serial input and output can be shortcircuited to each other, or further registers (32, 34, 36) can be selectively filled and emptied. In this manner, both the interior of the integrated circuit and respective interconnection functions can easily be tested by means of a universal protocol. Integrated circuits and the carrier only require minor extension/adaptations.

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