Testing integrated circuits by consolidating a plurality of digi

Details Testing integrated circuits by consolidating a plurality of digi Testing integrated circuits by consolidating a plurality of digi

1993-09-14

1996-07-30

Nguyen, Vinh P.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

324 731, 371 211, G01R 3100

Patent

active

055415059

ABSTRACT:
An apparatus for testing a semiconductor integrated circuit includes a plurality of probe lines and a plurality of sense lines which intersect each other to thereby define a plurality of intersections thereby as electrically isolated from each other. An electronic switch device is provided for each intersection for producing a multilevel signal, on an associated sense line, having one of a predetermined number of voltage levels corresponding to various combinations definable by a predetermined number of binary numbers supplied to test points from logic elements to be tested.
In a four test point embodiment, four test points are arranged such that each test point is located in a corresponding one of four quadrants defined by a pair of probe and sense lines intersecting each other. Preferably, the integrated circuit is in the form of a gate array.

REFERENCES:
patent: 4749947 (1988-06-01), Gheewala
patent: 4975640 (1990-12-01), Lipp
patent: 5065090 (1991-11-01), Gheewala
patent: 5202624 (1993-04-01), Gheewala

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