Testing integrated circuit capable of easily performing parametr

Details Testing integrated circuit capable of easily performing parametr Testing integrated circuit capable of easily performing parametr

1991-06-11

1992-05-19

Karlsen, Ernest F.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

371 221, 371 223, G01R 3128

Patent

active

051151910

ABSTRACT:
A boundary-scan-testing integrated circuit adapted to both a functional test of an entire IC chip and a parametric test for input and output buffers, connected to pads of the IC chip, in a periphery cell area of the IC chip. First memory circuits are respectively formed in an input buffer portion, an output buffer portion, and a bidirectional buffer portion, which are provided in the peripheral cell area of the IC chip. Second memory devices control ON/OFF operations of active elements, formed in the input buffer portion and the bidirectional buffer portion, for supplying a pad potential. Third memory devices control ON/OFF operations of tristate buffers of the output buffer portion and the bidirectional buffer portion. The first, second, and third memory devices are serially connected, thereby constituting a shift register controlled by a first control signal. First and second data selectors are operated by data output from the shift register, thereby controlling input and output buffers, and resistors for determining a potential of pads.

REFERENCES:
patent: 3790885 (1974-02-01), James
patent: 4348759 (1982-09-01), Schnurmann
patent: 4566104 (1986-01-01), Bradshaw et al.
patent: 4749947 (1988-06-01), Gheewala
patent: 4989209 (1991-01-01), Littlebury et al.

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