Testing circuit for semiconductor memory array

Details Testing circuit for semiconductor memory array Testing circuit for semiconductor memory array

1989-12-27

1992-04-28

Mintel, William

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 2314, 357 45, 365201, 324523, H01L 2968

Patent

active

051092573

ABSTRACT:
A test circuit is incorporated in a semiconductor memory device including at least one ultraviolet erasable and electrically programmable non-volatile memory cell having a control gate and a floating gate. The test circuit comprises a switching circuit for selectively supplying the control gate of the memory cell with a voltage which is higher than a power supply voltage for ordinary reading a content of the memory cell, through a write voltage supply line used for writing data to the memory cell. The switching circuit makes it possible to test the written state of the memory cell with a voltage different from the normal reading power supply voltage.

REFERENCES:
patent: 4841482 (1989-06-01), Kreifels et al.
patent: 4860259 (1989-08-01), Tobita
patent: 4870618 (1989-09-01), Iwashita
patent: 4956816 (1990-09-01), Atsumi et al.

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