Testing architecture with independent scan paths

Details Testing architecture with independent scan paths Testing architecture with independent scan paths

1993-03-05

1995-06-27

Voeltz, Emanuel T.

Excavating

371 221, 371 224, 324 731, G01R 31317, G06F 1122

Patent

active

054286220

ABSTRACT:
A scan test architecture includes first and second serial scan paths for transferring test data to and from an integrated circuit's logic. A first clock controls transfer of information on the first scan path and a second clock controls transfer of data on the second scan path. The first and second clocks are alternately enabled by a control signal initiated under program control of the external test system.

REFERENCES:
patent: 5001713 (1991-03-01), Whetsel
patent: 5054024 (1991-10-01), Whetsel
patent: 5210759 (1993-05-01), Dewitt et al.

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