Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor
Reexamination Certificate
2001-01-08
2003-02-04
Nguyen, Vinh P. (Department: 2829)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
With rotor
C324S765010
Reexamination Certificate
active
06515469
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a testing apparatus for investigating whether a semiconductor integrated circuit (hereafter referred to simply as an IC) obtained in a manufacturing process has adequate electrical characteristics or not to qualify it as a product, and also concerns a method for managing said testing apparatus by checking whether or not the test function of the testing apparatus is operating normally.
2. Description of Related Art
Conventionally, in a testing apparatus for ICs, when a plurality of IC chips, such as molded IC modules, have been arranged on a test standby part, the IC chips are transferred one after another by a handling mechanism to the test sample placement part for test. Each IC chip is subjected to an electrical measurement test at the test sample placement part, and if a measured value is within a specified tolerance, the test sample is determined as normal. After the test, the test samples are transferred one after another by the handling mechanism from the test sample placement part to the test sample return part.
Meanwhile, in the above-mentioned IC chip test process, if measured values are successively outside the specified tolerance for a plurality of test samples, the IC chips are most likely to be defective, but there is also a possibility that the test function itself of the testing apparatus is out of order.
Heretofore, in such a case, judgement as to whether the IC chips or the testing apparatus is abnormal has depended on the sense of the expert. As long as judgement depends on the expert's sense, it is not easy to make a quick and correct judgement. Moreover, if acceptable-quality IC chips are judged defective by an erroneous judgement, the production yield will decrease.
When measured values that are outside the required tolerance are obtained successively for a plurality of IC chips as mentioned above, without relying on the worker's sense, by running a diagnostic program incorporated in the testing apparatus for diagnosis of the test function of the testing apparatus, it becomes possible to make a correct decision as to the test function of the testing apparatus.
However, when the diagnostic program is executed, time is required for activating and executing the program, with the result that this interruption time amounts to a considerable length until the test operation on ICs is resumed. This causes a drop in efficiency in quality control test for ICs, which has become a problem.
Therefore, the object of the present invention is to provide a testing method and a testing apparatus that achieves an improvement in test efficiency by making a simple decision as to whether the test function itself is normal or not without running a diagnostic program mentioned above when abnormal measured values are given in succession for a plurality of ICs.
SUMMARY OF THE INVENTION
According to the present invention, there is provided a method for managing a testing apparatus including making a decision about whether a test function of the testing apparatus, used to inspect IC for defects, is normal or not, which comprises steps of when test results are given that there were successive defects in mutually different test pieces, measuring a standard sample by said testing apparatus; and
making a decision that the test function is normal if a result of the measurement of the standard sample is within a specified tolerance range, or making a decision that the test function is abnormal if a result of the measurement is outside the specified tolerance range.
The standard sample used in the managing method according to the present invention is a sample that shows electrical characteristics within a specified tolerance. Therefore, when the standard sample is measured, if a measured value of this sample is within the specified tolerance mentioned above, the test function is considered to be normal, and if the measured value is outside the specified tolerance, the test function itself is considered to be abnormal.
Therefore, according to the method of this patent application, it is possible to easily make a decision as to whether or not abnormality lies in the test function without executing a diagnostic program for diagnosis of the test function of the testing apparatus.
In the above-mentioned decision as a simple decision, when the test function is determined as abnormal, the diagnostic program can be executed automatically to make sure in which part of the test function the abnormality lies.
According to another invention, there is provided a testing apparatus for ICs, which comprises a test sample placement part for having a plurality of test samples sequentially placed for test in order to inspect ICs for defects;
a handling mechanism for transferring said test samples to the placement part;
a test function part for testing the test samples placed on the test sample placement part, and
a standard sample holder for placing a standard sample used for deciding whether the test function part is normal or not,
wherein when the plurality of test samples, inspected successively, were each determined to have a defect, the handling mechanism transfers the standard sample from the standard sample holder to the test sample placement part to test the standard sample in place of the test sample.
In the above-mentioned testing apparatus according to the present invention, when defective articles were detected continuously in the ICs, the handling mechanism transfers the above-mentioned standard sample to the test sample placement part, where the standard sample is tested by the test function part of the testing apparatus. In this way, the above-mentioned managing method of the testing apparatus according to the present invention can be carried out easily.
With this testing apparatus, if the measured value obtained by using the standard sample is within a specified tolerance, it is decided that the test function part is normal, or if the measured value is outside the specified tolerance, it is decided that the test function part is abnormal.
The testing apparatus may be provided with a self-diagnostic function part for carrying out diagnosis of the test function part when a decision has been made that the test function part is abnormal.
As the test sample and the standard sample, molded IC modules may be used.
As the test sample, an IC module having a number of ICs formed in a semiconductor wafer may be used and, on the other hand, as the standard sample, a molded IC package corresponding to the above-mentioned IC module may be used.
As the standard sample, one of the ICs that have been determined as normal by the above-mentioned test may be used.
REFERENCES:
patent: 5209132 (1993-05-01), Chayamichi et al.
patent: 5489854 (1996-02-01), Buck et al.
patent: 5621312 (1997-04-01), Achor et al.
patent: 5847572 (1998-12-01), Iwasaki et al.
patent: 07-128403 (1995-05-01), None
patent: 08-201466 (1996-08-01), None
patent: 09-197002 (1997-07-01), None
Nguyen Vinh P.
Oki Electric Industry Co, Ltd.
Rabin & Berdo P.C.
LandOfFree
Testing apparatus for semiconductor integrated circuits and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Testing apparatus for semiconductor integrated circuits and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Testing apparatus for semiconductor integrated circuits and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3178278