Testable multiple channel decoder

Details Testable multiple channel decoder Testable multiple channel decoder

1989-11-28

1990-11-20

Eisenzopf, Reinhard J.

Synthetic resins or natural rubbers -- part of the class 520 ser

Synthetic resins

Processes of preparing a desired or intentional composition...

324 731, 324158R, 371 221, 371 226, 371 251, G01R 3128, G06F 1100

Patent

active

049721445

ABSTRACT:
Transistors in a transistor array constructed in a testable multiple channel decoder are tested by setting the array in a test mode. A stuck low test, which detects an open circuit between a source and drain of a transistor, is executed by providing all address lines a first predetermined logic value. A stuck high test, which detects a short between a source and drain of a transistor, is executed by providing a first address line tested a second predetermined logic value and a second logic address line tested the first logic value.

REFERENCES:
patent: 3919504 (1975-11-01), Crosley et al.
patent: 4625310 (1986-11-01), Mercer
patent: 4674090 (1987-06-01), Chen et al.
patent: 4724341 (1988-02-01), Yamada et al.
patent: 4789825 (1988-12-01), Carelli et al.
patent: 4893311 (1990-01-01), Hunter et al.

Affiliated with

Also associated with

Rating

Testable multiple channel decoder does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Testable multiple channel decoder, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Testable multiple channel decoder will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-456006