1982-04-30
1984-11-27
Smith, Jerry
Excavating
324 73AT, 371 18, G06F 1100
Patent
active
044854722
ABSTRACT:
The interface circuit is intended to be connected between a module terminal and a module itself and provides means for stimulating and sensing signals between the module and its terminal. The interface circuit comprises a decoupling section which connects or disconnects the interface circuit from the module, a test data section for receiving test data from outside sources, an inside section which connects the test data section with the interior of the module and an outside section which connects it with the terminal. A monitor section is also included to allow a terminal to be monitored while it is connected to from its module. The control section requires only four connections and generates the various control signals necessary to control the operation of the interface circuit.
REFERENCES:
patent: 3814919 (1974-06-01), Repton et al.
patent: 3908117 (1975-09-01), Naruse et al.
patent: 4167780 (1979-09-01), Hayashi
patent: 4357703 (1982-11-01), Van Brunt
patent: 4403287 (1983-09-01), Blahut et al.
patent: 4410984 (1983-10-01), Negi et al.
Eichelberger, E. B. and Williams, T. W., "A Logic Design Structure for LSI Testability," Journal of Design Automation and Fault-Tolerant Computing 2(2):165-178, May 1978.
Frank, E. H. and Sproull, R. F., "Testing and Debugging Custom Integrated Circuits," CMU-CS-81-105, Computer Science Department, Carnegie-Mellon University, Feb. 1981.
Frank, E. H. and Sproull, R. F., "Two Timing Samplers," Proc. 1981 Caltech VLSI Conference, Jan. 1981.
Grason, J., and Nagle, A. W., "Digital Test Generation and Design for Testability," Proc. 1980 Design Automation Conference, Jun. 1980, pp. 175-189.
Hsu, F., et al., "Selective Controllability: A Proposal for Testing and Diagnosis," Proc. 1978 Semiconductor Test Conference, Oct.1978, pp. 170-175.
Sutherland, I. E., Molnar, C. E., Sproull, R. F. and Mudge, J. C., "The Trimosbus," Proc. 1979 Caltech Conference on VLSI, pp. 395-427, Jan. 1979.
Frank Edward H.
Sproull Robert
Carnegie-Mellon University
Smith Jerry
Ungerman Mark
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