Testable integrated circuit with reduced power dissipation

Excavating

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365201, G01R 3128

Patent

active

059075627

ABSTRACT:
An integrated circuit includes a plurality of internal devices that are tested by setting the states of their data registers to respective levels, first forming a known initialization value and then a functional data value. All the data registers used for testing are coupled as one or more shift registers and by clocking data through a serial scan path, test stimuli can be shifted in and results shifted out. The scan path connections are provided in addition to the usual functional operation signal connections. During functional operation, the data transitions in the scan path signals are disabled to reduce the power dissipation associated with driving the scan path signals.

REFERENCES:
patent: 4137563 (1979-01-01), Tsunoda
patent: 4737666 (1988-04-01), Umeda et al.
patent: 4897560 (1990-01-01), Saito et al.
patent: 5015875 (1991-05-01), Giles et al.
patent: 5202625 (1993-04-01), Farwell
patent: 5257267 (1993-10-01), Ishizaka
patent: 5291080 (1994-03-01), Amagasaki
patent: 5300831 (1994-04-01), Pham et al.
patent: 5379302 (1995-01-01), Andrews
patent: 5457790 (1995-10-01), Iwamura et al.
patent: 5467042 (1995-11-01), Smith et al.
patent: 5477493 (1995-12-01), Danbayashi
patent: 5477545 (1995-12-01), Huang
patent: 5491699 (1996-02-01), Scheuermann et al.
patent: 5497378 (1996-03-01), Amini et al.
patent: 5519714 (1996-05-01), Nakamura et al.
patent: 5592493 (1997-01-01), Crouch et al.
patent: 5614838 (1997-03-01), Jaber et al.
3 Page Publication, 1983 by Addison-Wesley Publishers Limited.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Testable integrated circuit with reduced power dissipation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Testable integrated circuit with reduced power dissipation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Testable integrated circuit with reduced power dissipation will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-405789

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.