Pulse or digital communications – Testing – Phase error or phase jitter
Reexamination Certificate
2011-03-15
2011-03-15
Payne, David C. (Department: 2611)
Pulse or digital communications
Testing
Phase error or phase jitter
C375S224000, C375S373000, C375S375000, C375S376000, C370S229000, C370S230000, C370S231000, C370S232000, C370S233000, C370S234000, C370S235000, C327S141000, C327S175000
Reexamination Certificate
active
07907661
ABSTRACT:
A method and circuit for testing phase interpolators is provided. The method performs a sweep over a phase interpolator delay range and detects if the phase interpolators experience an unacceptably large non-linearity which leads to inaccurate clock timing. The testing circuit implementing this technique uses a phase detector to detect a fault, and in one embodiment, an additional phase interpolator is added as well.
REFERENCES:
patent: 2004/0066873 (2004-04-01), Cho et al.
patent: 2006/0181319 (2006-08-01), Zhang
patent: 2009/0122849 (2009-05-01), Provost
Cool Patents, P.C.
Curtin Joseph P.
Intel Corporation
Kassa Zewdu
Payne David C.
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