1996-04-25
1997-10-14
Beausoliel, Jr., Robert W.
Excavating
371 225, G01R 3128
Patent
active
056779143
ABSTRACT:
A feed through circuit for an integrated circuit, including a first I/O pad (39); an input buffer (37) having an input connected to the first I/O pad and having an output; a second I/O pad (19); and an output buffer (15) having an input that is connected to the output of the input buffer and not connected to core logic circuitry of the integrated circuit, and further having an output that is connected to the second I/O pad; whereby a signal on the first I/O pad is fed through to the second I/O pad. Also disclosed is a feed through circuit that includes a first I/O pad (29); an input buffer (27) having an input that is connected to the first I/O pad and an output that is not connected to core logic circuitry of the integrated circuit; a multiplexer (21) having first and second inputs and an output, the first input being connected to the core logic circuitry and the second input being connected to the output of the input buffer; a second I/O pad (39); and an output buffer (35) having an input connected to the output of the multiplexer and an output connected to the first I/O pad; whereby a signal on the first I/O pad is fed through to the second I/O pad.
REFERENCES:
patent: 4987319 (1991-01-01), Kawana
patent: 5202625 (1993-04-01), Farwell
patent: 5457381 (1995-10-01), Farwell
patent: 5509128 (1996-04-01), Chan
patent: 5513186 (1996-04-01), Levitt
patent: 5519355 (1996-05-01), Nguyen
Fulcomer James L.
Zayas Eduardo R.
Alkov Leonard A.
Beausoliel, Jr. Robert W.
Denson-Low Wanda K.
Hughes Electronics
Iqbal Nadeem
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