Test technique for semiconductor memory array

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor

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Details

235153AC, 324 73R, 324158T, G01R 3100, G01R 3126

Patent

active

039952150

ABSTRACT:
Disclosed is a technique for testing electronic storage arrays including bistable storage cells fabricated in accordance with integrated semiconductor technology. Also described is the testing of load devices in a flip flop storage cell which is connected to a pair of bit lines that are inaccessible for the direct application of test signals. Testing is performed by altering the time duration of signals applied to the memory cells under test.

REFERENCES:
patent: 3795859 (1974-05-01), Benante et al.

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