Test system in an ATM system

Details Test system in an ATM system Test system in an ATM system

1995-11-30

1997-02-11

Olms, Douglas W.

Multiplex communications

Diagnostic testing

Path check

370395, 371 204, H04J 314

Patent

active

056028261

ABSTRACT:
A test system exactly checks the integrity of data in an ATM system, and generates a test cell of a desired band. In the first aspect of the system in which data stored in an ATM cell are transmitted in an 8-bit parallel format in the ATM system, a test cell generating device connected to an input line outputs a test cell having 1 in all of the eight bits or having zero in all of the eight bits, and the test cell confirming device connected to an output line of the ATM switch detects the above described data. In the second aspect, the test cell generating device provided in an input trunk outputs a test cell of a desired band based on a ratio between two optional integers N and n (N.gtoreq.n), the state of a buffer of the ATM switch is monitored, and a load test is conducted to determine whether or not any cell has been destroyed.

REFERENCES:
patent: 5251204 (1993-10-01), Izawa et al.
patent: 5257311 (1993-10-01), Naito et al.
patent: 5274641 (1993-12-01), Shobatake et al.
patent: 5299209 (1994-03-01), Murayama et al.
patent: 5313453 (1994-05-01), Uchida et al.

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