Test system for calculating the propagation delays in signal pat

Details Test system for calculating the propagation delays in signal pat Test system for calculating the propagation delays in signal pat

1993-11-02

1995-11-28

Nguyen, Vinh P.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

324 731, G01R 3128

Patent

active

054711363

ABSTRACT:
Propagation delays in signal paths leading to respective pins in an array of test system pins are determined using a probe which is wiped across the pins. Timing signals are applied to each of the signal paths in parallel, and pin identifying signals are applied to each of the signal paths such that each signal path and the pin to which it is connected receives a different pin identifying signal. When the probe is wiped across the pins, it detects signals on each of the pins with which it comes into contact. Any pin with which the probe is in contact is identified by detection of the pin identifying signal. The identifying and timing signals alternate, and once a pin has been identified, the timing signals on that pin are detected. The propagation delay in the signal path to the identified pin is then calculated from the detected timing signals.

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"Closed-Loop Error Correction: A Unique Approach to Test System Calibration" by Dahl; published in Feb., 1987.
"Timing Generation For DSP Testing"; by Rosenfeld; published in Apr. 1988.

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