Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2003-08-28
2004-11-02
Zarneke, David A. (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S537000, C324S1540PB
Reexamination Certificate
active
06812728
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a test method of internal connections in a semiconductor package used for a TV receiver and the like, specifically to a test method of internal connections in a semiconductor package which houses a CPU (Microcomputer) and a TV signal processing IC.
2. Description of the Related Art
Basic demodulation of TV signals to display video images on a screen is implemented with two integrated circuits i.e. a CPU and a TV signal processing IC in a TV receiver in recent years. The TV signal processing IC processes a brightness signal, a color signal and a deflection signal in the TV signals. The CPU gives the TV signal processing IC various instructions such as channel selection and image quality adjustment.
All integrated circuits are tested for connection, correct operation and so on before a semiconductor manufacturer ships them. The CPU and the TV signal processing IC are also tested with an IC tester. The two integrated circuits are purchased and mounted on a printed circuit board by a consumer electronics maker who manufactures TV receivers. After assembly, a test is made. That is, it is examined whether each of the two integrated circuits is connected properly, for example.
Recently, housing the CPU and the TV signal processing IC in a single semiconductor package has been considered. It means two chips in a single package, that is, a single semiconductor package housing two integrated circuits. The consumer electronics maker benefits from the single semiconductor package housing two integrated circuits because he only needs to purchase and mount the single semiconductor package which requires reduced wirings on the printed circuit board. However, the semiconductor manufacturer has no appropriate means to test connections between the two integrated circuits once they are packaged in the single semiconductor package.
SUMMARY OF THE INVENTION
This invention is directed to solve the problem addressed above, and offers a test method on internal connections in a semiconductor package housing a first integrated circuit and a second integrated circuit connected with each other, including applying a test signal to a first pin of the semiconductor package, applying the test signal from the first pin to the first integrated circuit, applying a first signal generated in the first integrated circuit from the test signal to the second integrated circuit, applying a second signal generated in the second integrated circuit from the first signal to the first integrated circuit, leading a third signal generated in the first integrated circuit from the second signal out of the semiconductor package through a second pin of the semiconductor package and confirming connections between the first integrated circuit and the second integrated circuit by verifying the third signal led out of the semiconductor package.
REFERENCES:
patent: 4963824 (1990-10-01), Hsieh et al.
patent: 5446395 (1995-08-01), Goto
patent: 5610530 (1997-03-01), Whetsel
patent: 5659257 (1997-08-01), Lu et al.
patent: 6297643 (2001-10-01), De Jong et al.
Hollington Jermele
Zarneke David A.
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