Test logic circuit and method for verifying internal logic of an

Details Test logic circuit and method for verifying internal logic of an Test logic circuit and method for verifying internal logic of an

1995-05-19

1997-02-25

Nguyen, Hoa T.

Excavating

371 251, 371 671, 326 16, 327199, G01R 3128

Patent

active

056065647

ABSTRACT:
A test logic circuit for testing the functioning of an integrated circuit containing asynchronous logic and synchronous logic and state machines is provided with a comparison circuit that compares state numbers produced by one of the state machines to a defined target value. The comparison circuit asserts a signal when one of the state numbers is equal to the defined target value. Status latches are coupled to the comparison circuit and latch a status of the asynchronous logic in response to the assertion of the signal by the comparison circuit. The comparing of the state numbers to a defined target value by the comparison circuit in the test logic circuit allows the latching of the status of the asynchronous logic upon the state machine reaching the specified state, and thereby provides the speed necessary to determine the status of the asynchronous logic for a particular state of a state machine in the integrated circuit.

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