Test input demultiplexing circuit

Details Test input demultiplexing circuit Test input demultiplexing circuit

1983-11-07

1986-09-16

Levy, Stewart J.

Electricity: measuring and testing

Plural, automatically sequential tests

307360, 371 15, G01R 3128

Patent

active

046124993

ABSTRACT:
A test signal, used to initialize an integrated circuit chip for testing, is multiplexed with a data input line of the chip. The test signal circuitry is inactivated during normal operation of the chip. The test circuitry is activated only when a special input signal, which is a voltage at some midpoint between logic states, is applied to the data input.

REFERENCES:
patent: 3117238 (1964-01-01), McNair, Jr.
patent: 4103190 (1978-07-01), Beutler
patent: 4274014 (1981-06-01), Schade, Jr.
patent: 4336495 (1982-06-01), Hapke
patent: 4339710 (1982-07-01), Hapke
patent: 4398146 (1983-08-01), Draheim et al.

Affiliated with

Also associated with

Rating

Test input demultiplexing circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Test input demultiplexing circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Test input demultiplexing circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1997576