Test generator for random access memories

Details Test generator for random access memories Test generator for random access memories

1978-10-24

1980-04-01

Malzahn, David H.

Excavating

371 51, G11C 2900

Patent

active

041957709

ABSTRACT:
The present disclosure describes electronic circuits for detecting functional failures of random access memory (RAM) devices. The circuits generate a bit pattern sequence for each memory address location and write the pattern into the memory. Subsequently, the pattern is regenerated and compared for equality with the pattern read from the memory. A complete RAM test comprises a sequence of patterns where each pattern is made to fill the entire memory matrix once. The number of test sequence patterns is a function of the bit organization of the RAM under test. Assuming that the device under test is a RAM of the type included within the tester's repertoire of testable memory devices, failure to achieve equality of the write/read patterns is indicative of a defective RAM.

REFERENCES:
patent: 3892955 (1975-07-01), Maejima
patent: 4055754 (1977-10-01), Chesley
patent: 4061908 (1977-12-01), Jonge et al.
patent: 4075466 (1978-02-01), Jonsson et al.
Bappert et al. "Memory Testing" IBM Tech. Disclosure Bulletin vol. 19 No. 5 Oct. 1976 p. 1621. _
Arnold et al., "Pattern Generator for a Multipart Number Test System" IBM Tech. Disclosure Bulletin vol. 19 No. 9 Feb. 1977 pp. 3487-3488. _

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