Test generation using signal flow graphs

Details Test generation using signal flow graphs Test generation using signal flow graphs

1996-01-05

1998-11-03

Brown, Glenn W.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324500, 364553, 364578, G01R 3102

Patent

active

058314377

ABSTRACT:
The present invention relates to a method and apparatus for generating test patterns to test an analog or mixed signal circuit. A signal flow graph of the analog circuit is determined. The signal flow graph is inverted and reverse simulated with good and bad outputs to determine component tolerances of the circuit given circuit output tolerances. The inverted signal flow graph is backtraced from analog outputs to obtain analog input sinusoids which justify the analog outputs.

REFERENCES:
patent: 4242751 (1980-12-01), Henckels et al.
patent: 4687988 (1987-08-01), Eichelberger et al.
patent: 5640403 (1997-06-01), Ishiyama et al.
patent: 5642296 (1997-06-01), Saxena
Balbanian et al. "Electrical Network Theory", John Wiley & Sons Inc., 1969, pp. 646-686.
N. Nagi et al. "Fault Simulation of Linear Analog Circuits" Journal of Electronic Testing, Nov. 1993, pp. 345-360.
P. Duhamel et al. "Automatic Test Generation Techniques For Analog Circuits and Systems: A Review", IEEE Trans. on Circuits and Systems Jul., 1979, pp. 411-440.
N. Nagi, et al. "Drafts: Discretized Analog Circuit Fault Simulator" 30th ACN/IEEE Design Automation Conf. pp. 509-514, 1993 (month unavailable).
A. Chatterjee "Concurrent Error Detection in Linear Analog and Switched Capacitor State Variable Systems Using Continuous Checksums", International Test Conf. 1991, pp. 582-591 (month unavailable).
A. Charoenrook et al., "Fault Diagnosis of Flash ADC Using DNL Test" International Test Conf., 1993 pp. 680-689 (month unavailable).
A.L. Rosenblum et al., "Multiparameter Sensitivity in Active RC Networks" IEEE Trans on Circuit Theory, Nov. 1971, pp. 592-599.
A. Meixner et al., "Fault Modeling For the Testing of Mixed Integrated Circuits" International Test Conf., 1991, pp. 564-572 (month unavailable).
G. Stenbakken et al. "Linear Error Modeling of Analog and Mixed-Signal Devices", Internatinal Test Conf. 1991, pp. 573-581 (month unavailable).
L. Milor et al. "Detection of Catastrophic Faults in Analog Integrated Circuits" IEEE Trans. on Computer-Aided Design, Feb. 1989, pp. 114-130.

Affiliated with

Also associated with

Rating

Test generation using signal flow graphs does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Test generation using signal flow graphs, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Test generation using signal flow graphs will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-693398