Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2001-05-01
2002-08-13
Sherry, Michael (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S765010
Reexamination Certificate
active
06433565
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to testing of flip chip ball grid array (FCBGA) integrated circuits. More specifically, but without limitation thereto, the present invention relates to a test fixture for detecting open and short defects in a flip chip ball grid array package.
The reduction in pad spacing or bump pitch for flip chip ball grid array packaging has created challenging requirements for testing each flip chip ball grid array package for open and short circuits. For example, existing technology for bump pitches of 250 microns and 225 microns is already being surpassed by new technology for bump pitches of 200 microns and 180 microns. As the reduction in pad pitch continues, test probe fixtures needed for testing flip chip ball grid array packages for open and short defects such as the Cobra probe become increasingly complex and costly to make. The tooling cost for an open/short test fixture for each new flip chip ball grid array package is currently about $100,000.
SUMMARY OF THE INVENTION
The present invention advantageously addresses the needs above as well as other needs by providing a method and apparatus for making a test fixture for a ball grid array package.
In one embodiment, the invention may be characterized as a method for making a test fixture for a ball grid array package that includes the steps of placing a test ball grid array package in a coarse pitch socket for making electrical contact between a test device and a plurality of wafer bumps formed on a fine pitch surface of the test ball grid array package; coupling the plurality of wafer bumps formed on the fine pitch surface of the test ball grid array package to a first opposite surface of an interposer; placing a subject ball grid array package to be tested in a coarse pitch socket for making electrical contact between the test device and a plurality of contact pads formed on a coarse pitch surface of the subject ball grid array package; and coupling a plurality of wafer bumps formed on a fine pitch surface of the subject ball grid array package to a second opposite surface of the interposer for making electrical contact between the test device and the plurality of wafer bumps formed on the fine pitch surface of the subject ball grid array package.
In another embodiment, the invention may be characterized as a test fixture for a ball grid array package that includes a test ball grid array package having a plurality of coarse pitch contacts formed on a coarse pitch surface of the test ball grid array package and a plurality of wafer bumps formed on a fine pitch surface of the test ball grid array package and an interposer coupled to the plurality of wafer bumps formed on the fine pitch surface of the test ball grid array package for coupling to a plurality of wafer bumps formed on a fine pitch surface of a subject ball grid array package.
The features and advantages summarized above in addition to other aspects of the present invention will become more apparent from the description, presented in conjunction with the following drawings.
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Alagaratnam Maniam
Desai Kishor V.
Patel Sunil A.
Fitch Even Tabin & Flannery
Hollington Jermele
LSI Logic Corporation
Sherry Michael
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