Test error detection method and system

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor

Reexamination Certificate

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C324S765010

Reexamination Certificate

active

07436168

ABSTRACT:
According to one embodiment, a method of test error detection for a wafer having a plurality of rows of integrated circuit (IC) chips is provided. The method includes determining that a first number of IC chips that are indicated as failing a test has increased from a first row to a second row immediately following the first row at least by a first threshold. The method also includes determining that a second number of IC chips that are indicated as failing the test has decreased from a previous row to a second row immediately following the previous row at least by a second threshold. The method also includes indicating that a group of one or more rows located between the first row and the second row includes one or more IC chips that have been tested incorrectly.

REFERENCES:
patent: 6906341 (2005-06-01), Byun et al.
patent: 2005/0186690 (2005-08-01), Chen et al.
patent: 2005/0212538 (2005-09-01), Oborny
Automated Wafer Analysis Using Wafer Map Autocorrelation□□Hopcraft, Geoffrey□□ARFTG Conference Digest, 1998. Computer-Aided Design and Test for High-Speed Electronics 52nd□□Dec. 3-4, 1998 pp. 82-87.

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