Pulse or digital communications – Testing – Phase error or phase jitter
Reexamination Certificate
2006-07-27
2010-10-05
Tran, Khanh C (Department: 2611)
Pulse or digital communications
Testing
Phase error or phase jitter
Reexamination Certificate
active
07809052
ABSTRACT:
A test circuit, system, and method are provided herein for testing one or more circuit components arranged upon a monolithic substrate. According to one embodiment, the system may include a test circuit and one or more circuit components, all of which are arranged upon the same monolithic substrate. In general, the test circuit may be configured for: (i) receiving an input signal at an input frequency, (ii) generating a test signal by modulating a phase of the input signal in accordance with a periodic signal, and (iii) supplying either the input signal or the test signal to the one or more integrated circuits, based on a control signal supplied to the test circuit. More specifically, the test circuit may be used to determine the jitter and/or duty cycle distortion (DCD) tolerance of any system component without changing the frequency of the clock signal supplied to the component or injecting noise into the clock recovery system.
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Cypress Semiconductor Corporation
Tran Khanh C
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